Problem: It is seen that the GPIO ISR was getting called more than once
for every button press.
Diagnosis:
The last instruction in the GPIO Interrupt handler is a write to the ICR
register which clears the interrupt. However, this write takes multiple
cycles, depending on the caching involved. As a result, after the
instruction to write to ICR, the microcontroller exits from the ISR
function but the write has not yet completed. The controller sees this
as a pending interrupt and goes into the ISR again. However, by the time
the controller enters the ISR this second time the ICR write has indeed
happened, and it appears to be a spurious interrupt call.
If the code is run in single-step debug mode, it gives the code enough
time to write to the ICR register and therefore the ISR is not called a
second time.
Solution:
Wait for a few cycles *after* the ICR write instruction and before
exiting from the ISR. The official documentation recommends a DSB
instruction but that may not be enough to account for vendor-specific
write-caching. In such a case a simple write to a register location
should be enough.
Additional Info:
https://developer.arm.com/documentation/ka003795/latest/
Abhijit Kshirsagar Kshirsagar