Update Group21_Lab06_Task2/main.c
GPIO_PORT_F Initialization
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@ -17,3 +17,17 @@ const long int PWM_PERIOD = 1000000; // Period for 100kHz in microseconds (10ms)
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#define INTEN (1 << 1) // Bit 1 of CSR to enable interrupt
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#define SYSTICK_RELOAD_VALUE(us) ((CLOCK_HZ / 1000000) * (us) - 1) // SysTick reload value in microseconds based on clock frequency
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void GPIO_PORT_F_init(void) {
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SYSCTL_RCGC2_R |= 0x00000020; // Enable clock to GPIOF
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GPIO_PORTF_LOCK_R = 0x4C4F434B; // Unlock commit register
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GPIO_PORTF_CR_R = 0x1F; // Make PORTF0 configurable
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GPIO_PORTF_DEN_R = 0x1F; // Set PORTF digital enable
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GPIO_PORTF_DIR_R = 0x0E; // Set PF0, PF4 as input and PF1, PF2, PF3 as output
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GPIO_PORTF_PUR_R = 0x11; // PORTF PF0 and PF4 is pulled up
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NVIC_EN0_R |= 1 << 30; // Enable interrupt for PORTF
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GPIO_PORTF_IS_R = 0x00; // Make it edge-sensitive
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GPIO_PORTF_IBE_R = 0x00; // Trigger on one edge
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GPIO_PORTF_IEV_R = 0x00; // Falling edge event
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GPIO_PORTF_IM_R |= 0x11; // Unmask interrupts for PF0 and PF4
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}
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