- IIT Dharwad
- https://www.linkedin.com/in/riteshbelgudri
-
Phd Scholar, working on FPGA Architecture explorations using Open Source tools such as VTR (Verilog to Routing), Yosys, nextpnr, Verilator
- Joined on
2025-01-02
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Phd Scholar, working on FPGA Architecture explorations using Open Source tools such as VTR (Verilog to Routing), Yosys, nextpnr, Verilator