done basic skeleton
This commit is contained in:
parent
13f0d05de5
commit
2b47f19f20
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@ -1 +1,25 @@
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*.zip
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*.zip
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# Compiled class file
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*.class
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# Log file
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*.log
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# BlueJ files
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*.ctxt
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# Mobile Tools for Java (J2ME)
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.mtj.tmp/
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# Package Files #
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*.jar
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*.war
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*.nar
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*.ear
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*.zip
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*.tar.gz
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*.rar
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# virtual machine crash logs, see http://www.java.com/en/download/help/error_hotspot.xml
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hs_err_pid*
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replay_pid*
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@ -1,5 +1,8 @@
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package generic;
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import java.io.FileInputStream;
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import java.io.InputStream;
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import processor.Clock;
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import processor.Processor;
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@ -19,7 +22,6 @@ public class Simulator {
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static void loadProgram(String assemblyProgramFile)
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{
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/*
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* TODO
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* 1. load the program into memory according to the program layout described
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* in the ISA specification
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* 2. set PC to the address of the first instruction in the main
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@ -28,6 +30,37 @@ public class Simulator {
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* x1 = 65535
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* x2 = 65535
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*/
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try (
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InputStream is = new FileInputStream(assemblyProgramFile);
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){
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int i = 0;
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byte[] line = new byte[4];
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boolean isFirstLine = true;
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while(is.read(line) != -1) {
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int value = 0;
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for(int j = 0; j < 4; j++) {
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value = (value << 8) | (line[j] & 0xff);
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}
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System.out.println(value);
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if(isFirstLine) {
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processor.getRegisterFile().setProgramCounter(value);
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isFirstLine = false;
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}else{
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processor.getMainMemory().setWord(i, value);
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i++;
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}
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}
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processor.getRegisterFile().setValue(0, 0);
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processor.getRegisterFile().setValue(1, 65535);
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processor.getRegisterFile().setValue(2, 65535);
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// Debug
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System.out.println(processor.getRegisterFile().getProgramCounter());
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System.out.println(processor.getMainMemory().getContentsAsString(0, 10));
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} catch (Exception e) {
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e.printStackTrace();
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}
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}
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public static void simulate()
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@ -44,6 +77,8 @@ public class Simulator {
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Clock.incrementClock();
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processor.getRWUnit().performRW();
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Clock.incrementClock();
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Statistics.setNumberOfInstructions(Statistics.getNumberOfInstructions() + 1);
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Statistics.setNumberOfCycles(Statistics.getNumberOfCycles() + 1);
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}
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// TODO
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@ -27,13 +27,22 @@ public class Statistics {
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Misc.printErrorAndExit(e.getMessage());
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}
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}
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// TODO write functions to update statistics
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public void setNumberOfInstructions(int numberOfInstructions) {
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public static int getNumberOfInstructions()
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{
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return numberOfInstructions;
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}
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public static int getNumberOfCycles()
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{
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return numberOfCycles;
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}
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public static void setNumberOfInstructions(int numberOfInstructions)
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{
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Statistics.numberOfInstructions = numberOfInstructions;
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}
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public void setNumberOfCycles(int numberOfCycles) {
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public static void setNumberOfCycles(int numberOfCycles) {
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Statistics.numberOfCycles = numberOfCycles;
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}
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}
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package processor.pipeline;
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public class EX_IF_LatchType {
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int pc;
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boolean IF_enable;
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public EX_IF_LatchType()
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{
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IF_enable = false;
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}
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public boolean isIF_enable() {
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return IF_enable;
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}
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public void setIF_enable(boolean iF_enable) {
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IF_enable = iF_enable;
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}
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public int getPC() {
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return pc;
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}
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public void setPC(int pc) {
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this.pc = pc;
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}
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}
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package processor.pipeline;
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import generic.Instruction;
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import generic.Operand;
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public class EX_MA_LatchType {
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boolean MA_enable;
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Operand op2;
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Instruction instruction;
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int aluResult;
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public EX_MA_LatchType()
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{
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MA_enable = false;
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}
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public void setInstruction(Instruction instruction) {
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this.instruction = instruction;
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}
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public Instruction getInstruction() {
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return instruction;
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}
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public void setOp2(Operand op2) {
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this.op2 = op2;
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}
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public Operand getOp2(){
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return op2;
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}
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public void setALUResult(int aluResult) {
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this.aluResult = aluResult;
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}
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public int getALUResult(){
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return aluResult;
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}
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public boolean isMA_enable() {
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return MA_enable;
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}
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package processor.pipeline;
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import processor.Processor;
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import generic.Instruction;
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import generic.Instruction.OperationType;
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import generic.Simulator;
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import generic.Operand.OperandType;
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public class Execute {
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Processor containingProcessor;
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public void performEX()
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{
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//TODO
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if(OF_EX_Latch.isEX_enable())
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{
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int op1 = OF_EX_Latch.getOp1();
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int op2 = OF_EX_Latch.getOp2();
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int imm = OF_EX_Latch.getImm();
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Instruction instruction = OF_EX_Latch.getInstruction();
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int cur_pc = containingProcessor.getRegisterFile().getProgramCounter();
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int alu_result = 0;
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OperationType alu_op = OF_EX_Latch.getInstruction().getOperationType();
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switch(alu_op)
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{
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case add: alu_result = op1 + op2; break;
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case addi: alu_result = op1 + imm; break;
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case sub: alu_result = op1 - op2; break;
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case subi: alu_result = op1 - imm; break;
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case mul: alu_result = op1 * op2; break;
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case muli: alu_result = op1 * imm; break;
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case div: alu_result = op1 / op2; break;
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case divi: alu_result = op1 / imm; break;
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case and: alu_result = op1 & op2; break;
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case andi: alu_result = op1 & imm; break;
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case or: alu_result = op1 | op2; break;
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case ori: alu_result = op1 | imm; break;
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case xor: alu_result = op1 ^ op2; break;
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case xori: alu_result = op1 ^ imm; break;
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case slt: alu_result= (op1 < op2) ? 1 : 0; break;
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case slti: alu_result= (op1 < imm) ? 1 : 0; break;
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case sll: alu_result = op1 << op2; break;
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case slli: alu_result = op1 << imm; break;
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case srl: alu_result = op1 >>> op2; break;
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case srli: alu_result = op1 >>> imm; break;
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case sra: alu_result = op1 >> op2; break;
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case srai: alu_result = op1 >> imm; break;
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case jmp:
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{
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OperandType optype = instruction.getDestinationOperand().getOperandType();
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if (optype == OperandType.Register){
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imm = containingProcessor.getRegisterFile().getValue(
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instruction.getDestinationOperand().getValue());
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}
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else{
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imm = OF_EX_Latch.getImm();
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}
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alu_result = cur_pc + imm;
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EX_IF_Latch.setIF_enable(true);
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EX_IF_Latch.setPC(alu_result);
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}
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break;
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case beq:
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{
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if(op1 == op2)
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{
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alu_result = cur_pc + imm;
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EX_IF_Latch.setIF_enable(true);
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EX_IF_Latch.setPC(alu_result);
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}
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}
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break;
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case bne:
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{
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if(op1 != op2)
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{
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alu_result = cur_pc + imm;
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EX_IF_Latch.setIF_enable(true);
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EX_IF_Latch.setPC(alu_result);
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}
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}
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break;
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case blt:
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{
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if(op1 < op2)
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{
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alu_result = cur_pc + imm;
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EX_IF_Latch.setIF_enable(true);
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EX_IF_Latch.setPC(alu_result);
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}
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}
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break;
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case bgt:
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{
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if(op1 > op2)
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{
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alu_result = cur_pc + imm;
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EX_IF_Latch.setIF_enable(true);
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EX_IF_Latch.setPC(alu_result);
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}
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}
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break;
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case end:
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{
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Simulator.setSimulationComplete(true);
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}
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default:
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break;
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}
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EX_MA_Latch.setALUResult(alu_result);
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EX_MA_Latch.setInstruction(OF_EX_Latch.getInstruction());
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EX_MA_Latch.setMA_enable(true);
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OF_EX_Latch.setEX_enable(false);
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}
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}
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}
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@ -1,12 +1,18 @@
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package processor.pipeline;
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import generic.Instruction;
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public class MA_RW_LatchType {
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boolean RW_enable;
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int aluResult;
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int load_result;
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Instruction instruction;
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public MA_RW_LatchType()
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{
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RW_enable = false;
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}
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public boolean isRW_enable() {
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@ -17,4 +23,27 @@ public class MA_RW_LatchType {
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RW_enable = rW_enable;
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}
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public void setALU_result(int alu_result) {
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this.aluResult = alu_result;
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}
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public int getALU_result() {
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return aluResult;
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}
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public void setLoad_result(int load_result) {
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this.load_result = load_result;
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}
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public int getLoad_result() {
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return load_result;
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}
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public void setInstruction(Instruction instruction) {
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this.instruction = instruction;
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}
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public Instruction getInstruction() {
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return instruction;
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}
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}
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|
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|
@ -1,6 +1,8 @@
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package processor.pipeline;
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import generic.Instruction;
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import processor.Processor;
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import generic.Instruction.OperationType;
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public class MemoryAccess {
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Processor containingProcessor;
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|
@ -16,7 +18,28 @@ public class MemoryAccess {
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public void performMA()
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{
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//TODO
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if(EX_MA_Latch.isMA_enable())
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{
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Instruction instruction = EX_MA_Latch.getInstruction();
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int alu_result = EX_MA_Latch.getALUResult();
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MA_RW_Latch.setALU_result(alu_result);
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OperationType op_type = instruction.getOperationType();
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if (op_type==OperationType.store)
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{
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int val_store = containingProcessor.getRegisterFile().getValue(
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instruction.getSourceOperand1().getValue());
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containingProcessor.getMainMemory().setWord(alu_result, val_store);
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}
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else if (op_type==OperationType.load)
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{
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int load_result = containingProcessor.getMainMemory().getWord(alu_result);
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MA_RW_Latch.setLoad_result(load_result);
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}
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MA_RW_Latch.setInstruction(instruction);
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MA_RW_Latch.setRW_enable(true);
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EX_MA_Latch.setMA_enable(false);
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}
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}
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}
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|
|
|
@ -1,14 +1,50 @@
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package processor.pipeline;
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import generic.Instruction;
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public class OF_EX_LatchType {
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boolean EX_enable;
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Instruction instruction;
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int op1, op2, imm;
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public OF_EX_LatchType()
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{
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EX_enable = false;
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}
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public void setInstruction(Instruction instruction) {
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this.instruction = instruction;
|
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}
|
||||
|
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public Instruction getInstruction() {
|
||||
return instruction;
|
||||
}
|
||||
|
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public void setOp1(int op1) {
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this.op1 = op1;
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}
|
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public int getOp1() {
|
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return op1;
|
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}
|
||||
|
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public void setOp2(int op2) {
|
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this.op2 = op2;
|
||||
}
|
||||
|
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public int getOp2() {
|
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return op2;
|
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}
|
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|
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public void setImm(int imm) {
|
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this.imm = imm;
|
||||
}
|
||||
|
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public int getImm() {
|
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return imm;
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}
|
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|
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public boolean isEX_enable() {
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return EX_enable;
|
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}
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|
@ -17,4 +53,5 @@ public class OF_EX_LatchType {
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EX_enable = eX_enable;
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}
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||||
|
||||
|
||||
}
|
||||
|
|
|
@ -1,11 +1,17 @@
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package processor.pipeline;
|
||||
|
||||
import java.util.Arrays;
|
||||
|
||||
import generic.Instruction;
|
||||
import processor.Processor;
|
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import generic.Instruction.OperationType;
|
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import generic.Operand;
|
||||
|
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public class OperandFetch {
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Processor containingProcessor;
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IF_OF_LatchType IF_OF_Latch;
|
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OF_EX_LatchType OF_EX_Latch;
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static OperationType[] opTypes = OperationType.values();
|
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|
||||
public OperandFetch(Processor containingProcessor, IF_OF_LatchType iF_OF_Latch, OF_EX_LatchType oF_EX_Latch)
|
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{
|
||||
|
@ -18,8 +24,80 @@ public class OperandFetch {
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|||
{
|
||||
if(IF_OF_Latch.isOF_enable())
|
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{
|
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//TODO
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int instruction = IF_OF_Latch.getInstruction();
|
||||
Instruction instr = new Instruction();
|
||||
String bin_instr = Integer.toBinaryString(instruction);
|
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int opcode = Integer.parseInt(bin_instr.substring(0, 5), 2);
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instr.setOperationType(opTypes[opcode]);
|
||||
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int R3_type_operators[] = {0,2,4,6,8,10,12,14,16,18,20};
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int R2I_type_operators[] = {1,3,5,7,9,11,13,15,17,19,21,22,23,25,26,27,28};
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int R1I_type_operators[] = {24,29};
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|
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// if (bin_instr.length() < 32) { // TODO: check if this is correct
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// int diff = 32 - bin_instr.length();
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// String zeros = "";
|
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// for (int i = 0; i < diff; i++) {
|
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// zeros += "0";
|
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// }
|
||||
// bin_instr = zeros + bin_instr;
|
||||
// }
|
||||
|
||||
if (Arrays.asList(R3_type_operators).contains(opcode)){
|
||||
Operand rs1 = new Operand();
|
||||
Operand rs2 = new Operand();
|
||||
Operand rd = new Operand();
|
||||
rs1.setOperandType(Operand.OperandType.Register);
|
||||
rs2.setOperandType(Operand.OperandType.Register);
|
||||
rd.setOperandType(Operand.OperandType.Register);
|
||||
|
||||
rs1.setValue(Integer.parseInt(bin_instr.substring(5, 10), 2));
|
||||
rs2.setValue(Integer.parseInt(bin_instr.substring(9, 14), 2));
|
||||
rd.setValue(Integer.parseInt(bin_instr.substring(14, 19), 2));
|
||||
|
||||
int op1 = containingProcessor.getRegisterFile().getValue(rs1.getValue());
|
||||
int op2 = containingProcessor.getRegisterFile().getValue(rs2.getValue());
|
||||
|
||||
OF_EX_Latch.setInstruction(instr);
|
||||
OF_EX_Latch.setOp1(op1);
|
||||
OF_EX_Latch.setOp2(op2);
|
||||
instr.setDestinationOperand(rd);
|
||||
instr.setSourceOperand1(rs1);
|
||||
instr.setSourceOperand2(rs2);
|
||||
}
|
||||
else if (Arrays.asList(R2I_type_operators).contains(opcode)){
|
||||
Operand rs1 = new Operand();
|
||||
Operand rd = new Operand();
|
||||
rs1.setOperandType(Operand.OperandType.Register);
|
||||
rd.setOperandType(Operand.OperandType.Register);
|
||||
|
||||
rs1.setValue(Integer.parseInt(bin_instr.substring(5, 10), 2));
|
||||
rd.setValue(Integer.parseInt(bin_instr.substring(14, 19), 2));
|
||||
|
||||
int imm = Integer.parseInt(bin_instr.substring(19, 32), 2); // TODO: 2's complement
|
||||
|
||||
int op1 = containingProcessor.getRegisterFile().getValue(rs1.getValue());
|
||||
|
||||
OF_EX_Latch.setInstruction(instr);
|
||||
OF_EX_Latch.setImm(imm);
|
||||
OF_EX_Latch.setOp1(op1);
|
||||
|
||||
instr.setDestinationOperand(rd);
|
||||
instr.setSourceOperand1(rs1);
|
||||
}
|
||||
else if (Arrays.asList(R1I_type_operators).contains(opcode)){
|
||||
Operand rd = new Operand();
|
||||
rd.setOperandType(Operand.OperandType.Register);
|
||||
rd.setValue(Integer.parseInt(bin_instr.substring(5, 10), 2));
|
||||
|
||||
instr.setDestinationOperand(rd);
|
||||
|
||||
int imm = Integer.parseInt(bin_instr.substring(10, 32), 2); // TODO: 2's complement
|
||||
|
||||
OF_EX_Latch.setInstruction(instr);
|
||||
OF_EX_Latch.setImm(imm);
|
||||
}
|
||||
|
||||
IF_OF_Latch.setOF_enable(false);
|
||||
OF_EX_Latch.setEX_enable(true);
|
||||
}
|
||||
|
|
|
@ -2,6 +2,8 @@ package processor.pipeline;
|
|||
|
||||
import generic.Simulator;
|
||||
import processor.Processor;
|
||||
import generic.Instruction;
|
||||
import generic.Instruction.OperationType;
|
||||
|
||||
public class RegisterWrite {
|
||||
Processor containingProcessor;
|
||||
|
@ -19,10 +21,29 @@ public class RegisterWrite {
|
|||
{
|
||||
if(MA_RW_Latch.isRW_enable())
|
||||
{
|
||||
//TODO
|
||||
|
||||
// if instruction being processed is an end instruction, remember to call Simulator.setSimulationComplete(true);
|
||||
|
||||
Instruction instruction = MA_RW_Latch.getInstruction();
|
||||
OperationType op_type = instruction.getOperationType();
|
||||
int alu_result = MA_RW_Latch.getALU_result();
|
||||
|
||||
if (op_type==OperationType.load)
|
||||
{
|
||||
int load_result = MA_RW_Latch.getLoad_result();
|
||||
int rd = instruction.getDestinationOperand().getValue();
|
||||
containingProcessor.getRegisterFile().setValue(rd, load_result);
|
||||
}
|
||||
else if (op_type==OperationType.end)
|
||||
{
|
||||
Simulator.setSimulationComplete(true);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (op_type!=OperationType.store && op_type!= OperationType.jmp && op_type!= OperationType.beq && op_type!=OperationType.bne && op_type!=OperationType.blt && op_type!=OperationType.bgt)
|
||||
{
|
||||
int rd = instruction.getDestinationOperand().getValue();
|
||||
rd = instruction.getDestinationOperand().getValue();
|
||||
containingProcessor.getRegisterFile().setValue(rd, alu_result);
|
||||
}
|
||||
}
|
||||
MA_RW_Latch.setRW_enable(false);
|
||||
IF_EnableLatch.setIF_enable(true);
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue