rajshekar.k
/
Tejas
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

file interface support for multiple threads; icachebuffer bug fix; cache statistics made richer with half misses, combined writes

This commit is contained in:
Rajshekar K K 2020-09-21 18:48:38 +05:30
parent aa5755c34e
commit a0f7fb276d
6 changed files with 82 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
src/simulator/emulatorinterface/RunnableThread.java
View File

@ -119,10 +119,10 @@ public class RunnableThread implements Encoding, Runnable {
&& EmulatorConfig.communicationType == CommunicationType.file) {
//trace-file based simulation
for(int core = 0; core < maxCoreAssign; core++)
{
ArchitecturalComponent.getCore(core).getExecEngine().setExecutionBegun(true);
}
// for(int core = 0; core < maxCoreAssign; core++)
// {
// ArchitecturalComponent.getCore(core).getExecEngine().setExecutionBegun(true);
// }
long microOpsReadFromFile = 0;
long microOpsSentToPipelines = 0;
@ -151,6 +151,9 @@ public class RunnableThread implements Encoding, Runnable {
iNew =Instruction.getInvalidInstruction();
else
{
if(ArchitecturalComponent.getCore(core).getExecEngine().isExecutionBegun() == false)
ArchitecturalComponent.getCore(core).getExecEngine().setExecutionBegun(true);
microOpsReadFromFile++;
if(microOpsReadFromFile < SimulationConfig.NumInsToIgnore)
{
@ -205,8 +208,12 @@ public class RunnableThread implements Encoding, Runnable {
}
}
inputToPipeline[core].enqueue(iNew);
microOpsSentToPipelines++;
if(ArchitecturalComponent.getCore(core).getExecEngine().isExecutionBegun())
{
inputToPipeline[core].enqueue(iNew);
microOpsSentToPipelines++;
}
if(line==null)
{
tracesDoneReading[core] = true;

28
src/simulator/generic/Statistics.java
View File

@ -490,19 +490,23 @@ public class Statistics {
}
}
static void printStatisticsForACache(String name,
long hits, long misses, long numberOfCompulsoryMisses, long evictions, double avgNumEventsInMSHR, double avgNumEventsInMSHREntry) throws IOException
static void printStatisticsForACache(String name, long requests,
long hits, long misses, long halfmisses, long combinedWrites, long numberOfCompulsoryMisses, long evictions, long accesses, double avgNumEventsInMSHR, double avgNumEventsInMSHREntry) throws IOException
{
outputFileWriter.write("\n");
outputFileWriter.write("\n" + name + " Requests\t=\t" + requests);
outputFileWriter.write("\n" + name + " Hits\t=\t" + hits);
outputFileWriter.write("\n" + name + " Misses\t=\t" + misses);
outputFileWriter.write("\n" + name + " Accesses\t=\t" + (hits+misses));
outputFileWriter.write("\n" + name + " Compulsory Misses\t=\t" + numberOfCompulsoryMisses);
outputFileWriter.write("\n" + name + " Full-Misses\t=\t" + misses);
outputFileWriter.write("\n" + name + " Half-Misses\t=\t" + halfmisses);
outputFileWriter.write("\n" + name + " Combined-Writes\t=\t" + combinedWrites);
if(Cache.toCountCompulsoryMisses)
outputFileWriter.write("\n" + name + " Compulsory Misses\t=\t" + numberOfCompulsoryMisses);
outputFileWriter.write("\n" + name + " Accesses\t=\t" + accesses);
float hitrate = (float)hits/(float)(hits+misses);
float hitrate = (float)hits/(float)(requests);
outputFileWriter.write("\n" + name + " Hit-Rate\t=\t" + hitrate);
float missrate = (float)misses/(float)(hits+misses);
float missrate = (float)(misses+halfmisses)/(float)(requests);
outputFileWriter.write("\n" + name + " Miss-Rate\t=\t" + missrate);
outputFileWriter.write("\n" + name + " AvgNumEventsInMSHR\t=\t" + formatDouble(avgNumEventsInMSHR));
@ -514,19 +518,23 @@ public class Statistics {
static void printCacheStats(Cache c) throws IOException
{
printStatisticsForACache(c.toString(), c.hits, c.misses, c.numberOfCompulsoryMisses, c.evictions, c.getAvgNumEventsPendingInMSHR(), c.getAvgNumEventsPendingInMSHREntry());
printStatisticsForACache(c.toString(), c.noOfRequests, c.hits, c.misses, c.halfmisses, c.combinedWrites, c.numberOfCompulsoryMisses, c.evictions, c.noOfAccesses, c.getAvgNumEventsPendingInMSHR(), c.getAvgNumEventsPendingInMSHREntry());
}
static void printConsolidatedCacheStats(String cacheName,
Vector<Cache> cacheArray) throws IOException
{
long hits = 0, misses = 0, compulsoryMisses = 0, evictions = 0;
long requests = 0, hits = 0, misses = 0, halfmisses = 0, combinedWrites = 0, compulsoryMisses = 0, evictions = 0, accesses = 0;
for(Cache c : cacheArray) {
requests += c.noOfRequests;
hits += c.hits;
misses += c.misses;
halfmisses += c.halfmisses;
combinedWrites += c.combinedWrites;
compulsoryMisses += c.numberOfCompulsoryMisses;
evictions += c.evictions;
accesses = c.noOfAccesses;
}
int numCaches = 0;
@ -544,7 +552,7 @@ public class Statistics {
avgNumEventsInMSHR = avgNumEventsInMSHR / (double)numCaches;
avgNumEventsInMSHREntry = avgNumEventsInMSHREntry / (double)numCaches;
printStatisticsForACache(cacheName, hits, misses, compulsoryMisses, evictions, avgNumEventsInMSHR, avgNumEventsInMSHREntry);
printStatisticsForACache(cacheName, requests, hits, misses, halfmisses, combinedWrites, compulsoryMisses, evictions, accesses, avgNumEventsInMSHR, avgNumEventsInMSHREntry);
}
static void printInsWorkingSetStats() throws IOException {

56
src/simulator/memorysystem/Cache.java
View File

@ -97,6 +97,8 @@ public class Cache extends SimulationElement {
public long noOfWritesReceived;
public long hits;
public long misses;
public long halfmisses;
public long combinedWrites;
public long evictions;
public boolean debug = false;
public NucaType nucaType;
@ -201,6 +203,8 @@ public class Cache extends SimulationElement {
noOfWritesReceived = 0;
this.hits = 0;
this.misses = 0;
this.halfmisses = 0;
this.combinedWrites = 0;
this.evictions = 0;
// make the cache
makeCache(cacheParameters.isDirectory);
@ -218,6 +222,8 @@ public class Cache extends SimulationElement {
addressesAccessedSoFar = new TreeSet<Long>();
numberOfCompulsoryMisses = 0;
}
halfmissList = new ArrayList<Event>();
}
@ -227,6 +233,19 @@ public class Cache extends SimulationElement {
private boolean printCacheDebugMessages = false;
//request (read or write or line-forward from another cache)
// - read (*reads++)
// - line found in cache (hits++)
// - line not in cache
// - entry exists in MSHR for same addr (halfmisses++)
// - no MSHR entry (misses++)
// - write (*writes++)
// - line found in cache (hits++)
// - line not in cache
// - entry exists in MSHR for same addr (halfmisses++)
// - latest MSHR entry for that addr is a write (combinedWrites++)
// - no MSHR entry (misses++)
ArrayList<Event> halfmissList;
public void handleEvent(EventQueue eventQ, Event e) {
@ -236,9 +255,24 @@ public class Cache extends SimulationElement {
long addr = ((AddressCarryingEvent) event).getAddress();
RequestType requestType = event.getRequestType();
noOfAccesses++;
if(mshr.isAddrInMSHR(addr) &&
(requestType==RequestType.Cache_Read || requestType==RequestType.Cache_Write || requestType==RequestType.EvictCacheLine)) {
if(requestType==RequestType.Cache_Read || requestType==RequestType.Cache_Write)
{
halfmisses++;
noOfRequests++;
// if(this.cacheName.contains("L1"))
// {
// System.out.println("half miss event added to mshr : " + e.serializationID);
// halfmissList.add(event);
// if(event.serializationID == 4385)
// {
// System.out.println(event.serializationID);
// }
// }
}
mshr.addToMSHR(event);
return;
}
@ -246,6 +280,7 @@ public class Cache extends SimulationElement {
switch (event.getRequestType()) {
case Cache_Read:
case Cache_Write: {
noOfRequests++;
handleAccess(addr, requestType, event);
break;
}
@ -266,6 +301,7 @@ public class Cache extends SimulationElement {
}
case DirectoryCachelineForwardRequest: {
noOfRequests++;
handleDirectoryCachelineForwardRequest(addr, (Cache) (((AddressCarryingEvent) event).getPayloadElement()));
break;
}
@ -355,8 +391,10 @@ public class Cache extends SimulationElement {
// IF HIT
if (cl != null) {
hits++;
cacheHit(addr, requestType, cl, event);
} else {
misses++;
if (this.mycoherence != null) {
if (requestType == RequestType.Cache_Write) {
mycoherence.writeMiss(addr, this);
@ -378,9 +416,6 @@ public class Cache extends SimulationElement {
protected void cacheHit(long addr, RequestType requestType, CacheLine cl,
AddressCarryingEvent event) {
hits++;
noOfRequests++;
noOfAccesses++;
if (requestType == RequestType.Cache_Read) {
sendAcknowledgement(event);
@ -561,11 +596,6 @@ public class Cache extends SimulationElement {
}
public void fillAndSatisfyRequests(long addr) {
int numPendingEvents = mshr.getNumPendingEventsForAddr(addr);
misses += numPendingEvents;
noOfRequests += numPendingEvents;
noOfAccesses += 1 + numPendingEvents;
CacheLine evictedLine = this.fill(addr, MESI.SHARED);
handleEvictedLine(evictedLine);
processEventsInMSHR(addr);
@ -579,10 +609,20 @@ public class Cache extends SimulationElement {
switch(event.getRequestType()) {
case Cache_Read: {
sendAcknowledgement(event);
// if(this.cacheName.contains("L1"))
// {
// System.out.println("process read miss : " + event.serializationID);
// halfmissList.remove(event);
// }
break;
}
case Cache_Write: {
// if(this.cacheName.contains("L1"))
// {
// System.out.println("process write miss : " + event.serializationID);
// halfmissList.remove(event);
// }
CacheLine cl = accessValid(addr);
if(cl!=null) {

1
src/simulator/memorysystem/MSHR.java
View File

@ -28,6 +28,7 @@ public class MSHR {
if(event.getRequestType() == RequestType.Cache_Write
&& missList.getLast().getRequestType() == RequestType.Cache_Write)
{
containingCache.combinedWrites++;
return;
}
missList.add(event);

2
src/simulator/pipeline/multi_issue_inorder/FetchUnitIn_MII.java
View File

@ -52,7 +52,7 @@ public class FetchUnitIn_MII extends SimulationElement
this.ifId_latch = execEngine.getIfIdLatch();
this.fetchBufferCapacity = (int)(core.getIssueWidth()
* (SystemConfig.core[core.getCore_number()].getICacheLatency()));
* (SystemConfig.core[core.getCore_number()].getICacheLatency()/core.getStepSize()));
this.fetchBuffer = new Instruction[this.fetchBufferCapacity];
this.fetchFillCount=0;
this.fetchBufferIndex=0;

2
src/simulator/pipeline/outoforder/OutOrderExecutionEngine.java
View File

@ -230,7 +230,7 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
this.coreMemorySystem = coreMemorySystem;
this.outOrderCoreMemorySystem = (OutOrderCoreMemorySystem)coreMemorySystem;
this.iCacheBuffer = new ICacheBuffer((int)(core.getDecodeWidth() *
coreMemorySystem.getiCache().getLatency()));
coreMemorySystem.getiCache().getLatency()/core.getStepSize()));
this.fetcher.setICacheBuffer(iCacheBuffer);
}