completing the previous commit
This commit is contained in:
parent
aed6b8ea20
commit
7f1c3f36ce
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@ -215,18 +215,6 @@ void sendTimerPacket(int tid, bool compulsory) {
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}
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}
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}
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bool isThreadBeyondNumberOfCores(int threadID)
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{
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int index;
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for(index=0; index < MaxNumActiveThreads; index++)
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{
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if(threadMapping[index] == (unsigned int)threadID)
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return false;
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if(isThreadActive[index] == false)
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return false;
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}
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return true;
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}
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int findThreadMapping(unsigned int id)
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{
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int index;
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@ -235,10 +223,9 @@ int findThreadMapping(unsigned int id)
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if(threadMapping[index] == id)
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return index;
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}
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// cout<<"FATAL ERROR : ThreadMapping cannot resolve " << id << endl;
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return 1;
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// fflush(stdout);
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// exit(0);
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cout<<"FATAL ERROR : ThreadMapping cannot resolve";
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fflush(stdout);
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exit(0);
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}
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#define cmp(a) (rtn_name->find(a) != string::npos)
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@ -270,19 +257,10 @@ int findParentSegment(long parent)
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return index;
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}
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cout<<"FATAL ERROR--- cannot find parent\n";
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return 0;
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return -1;
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}
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VOID ThreadStart(THREADID threadid, CONTEXT *ctxt, INT32 flags, VOID *v) {
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cout << "threadstart() : tid = " << threadid << " " << isThreadBeyondNumberOfCores((int)threadid) << endl;
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if(isThreadBeyondNumberOfCores((int)threadid)) {
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return;
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}
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if(threadid != 45) {
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return;
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}
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PIN_MutexLock(&mainLockForPintool);
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numThreads++;
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livethreads++;
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@ -316,7 +294,6 @@ cout << "threadstart() : tid = " << threadid << " " << isThreadBeyondNumberOfCor
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fflush(stdout);
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pumpingStatus[i] = true;
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threadid = findThreadMapping(threadid);
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cout << "app thread mapped to tejas thread " << threadid << endl;
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tst->onThread_start(threadid);
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while (tst->analysisFn(threadid, parent, CHILD_START, PIN_GetParentTid()) == -1) {
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PIN_Yield();
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@ -347,9 +324,6 @@ VOID ThreadFini(THREADID tid, const CONTEXT *ctxt, INT32 flags, VOID *v) {
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//Pass a memory read record
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VOID RecordMemRead(THREADID tid, VOID * ip, VOID * addr) {
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if(tid != 45)
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return;
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tid= findThreadMapping(tid);
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if (!isActive(tid))
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return;
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@ -376,9 +350,6 @@ VOID RecordMemRead(THREADID tid, VOID * ip, VOID * addr) {
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// Pass a memory write record
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VOID RecordMemWrite(THREADID tid, VOID * ip, VOID * addr) {
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if(tid != 45)
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return;
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tid= findThreadMapping(tid);
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if (!isActive(tid))
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return;
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@ -403,9 +374,6 @@ VOID RecordMemWrite(THREADID tid, VOID * ip, VOID * addr) {
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}
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VOID BrnFun(THREADID tid, ADDRINT tadr, BOOL taken, VOID *ip) {
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if(tid != 45)
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return;
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tid= findThreadMapping(tid);
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if (!isActive(tid))
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return;
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@ -570,37 +538,20 @@ VOID printip(THREADID tid, VOID *ip, char *asmString) {
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instructionIgnorePhase = true;
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}
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if(numInsToSimulate > 0)
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if(numInsToSimulate > 0 && totalNumCISC >= (numInsToIgnore + numInsToSimulate))
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{
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bool subsetDone = false;
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// for(int i = 0; i < MaxNumActiveThreads; i++)
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// {
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// if(numCISC[i] >= (numInsToIgnore + numInsToSimulate))
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// {
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// subsetDone = true;
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// break;
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// }
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// }
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if(numCISC[0] >= (numInsToIgnore + numInsToSimulate))
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{
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subsetDone = true;
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// Now, we will write -2 packet in shared memory.
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// This will ensure that complete emulator (PIN) gets stopped.
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while (tst->onSubset_finish((int)tid, (numCISC[tid])) == -1) {
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PIN_Yield();
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}
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if(subsetDone)
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{
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// Now, we will write -2 packet in shared memory.
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// This will ensure that complete emulator (PIN) gets stopped.
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while (tst->onSubset_finish((int)tid, (numCISC[tid])) == -1) {
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PIN_Yield();
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}
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cout<<"subset finish called by thread "<<tid<<endl;
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fflush(stdout);
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cout<<"subset finish called by thread "<<tid<<endl;
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fflush(stdout);
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tst->setSubsetsimComplete(true);
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// threadAlive[tid] = false;
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waitForThreadsAndTerminatePin();
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}
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tst->setSubsetsimComplete(true);
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// threadAlive[tid] = false;
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waitForThreadsAndTerminatePin();
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}
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}
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else
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@ -713,13 +664,8 @@ void Image(IMG img,VOID *v) {
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// Pin calls this function every time a new instruction is encountered
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VOID Instruction(INS ins, VOID *v) {
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int tid = IARG_THREAD_ID;
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//cout << "thread = " << tid << endl;
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if(isThreadBeyondNumberOfCores(tid))
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return;
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//int tid = IARG_THREAD_ID;
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if(tid != 45)
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return;
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char *asmChar = NULL;
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if(traceMethod==File) {
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@ -64,9 +64,9 @@ public class CoreConfig
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public int ROBSize;
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public int IWSize;
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public int IntRegFileSize;
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public int FloatRegFileSize;
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public int VectorRegFileSize;
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public int IntArchRegNum;
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public int FloatArchRegNum;
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public int VectorArchRegNum;
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public int BranchMispredPenalty;
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@ -78,8 +78,21 @@ public class CoreConfig
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public int FloatALUNum;
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public int FloatMulNum;
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public int FloatDivNum;
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public int JumpNum;
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public int MemoryNum;
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public int IntVectorALUNum;
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public int IntVectorMulNum;
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public int FloatVectorALUNum;
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public int FloatVectorMulNum;
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public int FMANum;
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public int BranchNum;
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public int LoadNum;
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public int LoadAGUNum;
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public int StoreNum;
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public int StoreAGUNum;
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public int AESNum;
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public int VectorStringNum;
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public int BitScanNum;
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public int VectorShuffleNum;
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public int LEANum;
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public int IntALULatency;
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public int IntMulLatency;
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@ -87,8 +100,21 @@ public class CoreConfig
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public int FloatALULatency;
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public int FloatMulLatency;
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public int FloatDivLatency;
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public int JumpLatency;
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public int MemoryLatency;
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public int IntVectorALULatency;
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public int IntVectorMulLatency;
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public int FloatVectorALULatency;
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public int FloatVectorMulLatency;
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public int FMALatency;
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public int BranchLatency;
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public int LoadLatency;
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public int LoadAGULatency;
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public int StoreLatency;
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public int StoreAGULatency;
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public int AESLatency;
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public int VectorStringLatency;
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public int BitScanLatency;
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public int VectorShuffleLatency;
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public int LEALatency;
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public int IntALUReciprocalOfThroughput;
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public int IntMulReciprocalOfThroughput;
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@ -96,8 +122,21 @@ public class CoreConfig
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public int FloatALUReciprocalOfThroughput;
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public int FloatMulReciprocalOfThroughput;
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public int FloatDivReciprocalOfThroughput;
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public int JumpReciprocalOfThroughput;
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public int MemoryReciprocalOfThroughput;
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public int IntVectorALUReciprocalOfThroughput;
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public int IntVectorMulReciprocalOfThroughput;
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public int FloatVectorALUReciprocalOfThroughput;
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public int FloatVectorMulReciprocalOfThroughput;
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public int FMAReciprocalOfThroughput;
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public int BranchReciprocalOfThroughput;
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public int LoadReciprocalOfThroughput;
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public int LoadAGUReciprocalOfThroughput;
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public int StoreReciprocalOfThroughput;
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public int StoreAGUReciprocalOfThroughput;
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public int AESReciprocalOfThroughput;
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public int VectorStringReciprocalOfThroughput;
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public int BitScanReciprocalOfThroughput;
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public int VectorShuffleReciprocalOfThroughput;
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public int LEAReciprocalOfThroughput;
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public int[] IntALUPortNumbers;
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public int[] IntMulPortNumbers;
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@ -105,8 +144,21 @@ public class CoreConfig
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public int[] FloatALUPortNumbers;
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public int[] FloatMulPortNumbers;
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public int[] FloatDivPortNumbers;
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public int[] JumpPortNumbers;
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public int[] MemoryPortNumbers;
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public int[] IntVectorALUPortNumbers;
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public int[] IntVectorMulPortNumbers;
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public int[] FloatVectorALUPortNumbers;
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public int[] FloatVectorMulPortNumbers;
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public int[] FMAPortNumbers;
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public int[] BranchPortNumbers;
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public int[] LoadPortNumbers;
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public int[] LoadAGUPortNumbers;
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public int[] StorePortNumbers;
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public int[] StoreAGUPortNumbers;
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public int[] AESPortNumbers;
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public int[] VectorStringPortNumbers;
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public int[] BitScanPortNumbers;
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public int[] VectorShufflePortNumbers;
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public int[] LEAPortNumbers;
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public Vector<CacheConfig> coreCacheList = new Vector<CacheConfig>();
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@ -122,20 +174,39 @@ public class CoreConfig
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public EnergyConfig intRATPower;
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public EnergyConfig floatRATPower;
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public EnergyConfig intFreeListPower;
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public EnergyConfig floatFreeListPower;
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public EnergyConfig vectorFreeListPower;
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public EnergyConfig lsqPower;
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public EnergyConfig intRegFilePower;
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public EnergyConfig floatRegFilePower;
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public EnergyConfig vectorRegFilePower;
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public EnergyConfig iwPower;
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public EnergyConfig robPower;
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public EnergyConfig intALUPower;
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public EnergyConfig floatALUPower;
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public EnergyConfig complexALUPower;
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public EnergyConfig resultsBroadcastBusPower;
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public EnergyConfig iTLBPower;
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public EnergyConfig dTLBPower;
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public EnergyConfig sTLBPower;
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public EnergyConfig IntALUPower;
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public EnergyConfig IntMulPower;
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public EnergyConfig IntDivPower;
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public EnergyConfig FloatALUPower;
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public EnergyConfig FloatMulPower;
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public EnergyConfig FloatDivPower;
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public EnergyConfig IntVectorALUPower;
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public EnergyConfig IntVectorMulPower;
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public EnergyConfig FloatVectorALUPower;
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public EnergyConfig FloatVectorMulPower;
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public EnergyConfig FMAPower;
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public EnergyConfig BranchPower;
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public EnergyConfig LoadPower;
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public EnergyConfig LoadAGUPower;
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public EnergyConfig StorePower;
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public EnergyConfig StoreAGUPower;
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public EnergyConfig AESPower;
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public EnergyConfig VectorStringPower;
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public EnergyConfig BitScanPower;
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public EnergyConfig VectorShufflePower;
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public EnergyConfig LEAPower;
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public int getICacheLatency() {
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int latency = 0;
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@ -506,7 +506,7 @@ public class XMLParser
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Element freelistElmnt = (Element)(renameElmnt.getElementsByTagName("FreeList")).item(0);
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core.intFreeListPower = getEnergyConfig((Element)freelistElmnt.getElementsByTagName("Integer").item(0));
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core.floatFreeListPower = getEnergyConfig((Element)freelistElmnt.getElementsByTagName("Float").item(0));
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core.vectorFreeListPower = getEnergyConfig((Element)freelistElmnt.getElementsByTagName("Float").item(0));
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Element registerFileElmnt = (Element)(coreElmnt.getElementsByTagName("RegisterFile")).item(0);
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@ -515,10 +515,10 @@ public class XMLParser
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core.IntArchRegNum = Integer.parseInt(getImmediateString("IntArchRegNum", integerRegisterFileElmnt));
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core.intRegFilePower = getEnergyConfig(integerRegisterFileElmnt);
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Element floatRegisterFileElmnt = (Element)(registerFileElmnt.getElementsByTagName("Float")).item(0);
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core.FloatRegFileSize = Integer.parseInt(getImmediateString("FloatRegFileSize", floatRegisterFileElmnt));
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core.FloatArchRegNum = Integer.parseInt(getImmediateString("FloatArchRegNum", floatRegisterFileElmnt));
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core.floatRegFilePower = getEnergyConfig(floatRegisterFileElmnt);
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Element vectorRegisterFileElmnt = (Element)(registerFileElmnt.getElementsByTagName("Vector")).item(0);
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core.VectorRegFileSize = Integer.parseInt(getImmediateString("VectorRegFileSize", vectorRegisterFileElmnt));
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core.VectorArchRegNum = Integer.parseInt(getImmediateString("VectorArchRegNum", vectorRegisterFileElmnt));
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core.vectorRegFilePower = getEnergyConfig(vectorRegisterFileElmnt);
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core.ExecutionCoreNumPorts = Integer.parseInt(coreElmnt.getElementsByTagName("ExecutionCoreNumPorts").item(0).getFirstChild().getNodeValue());
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@ -531,6 +531,7 @@ public class XMLParser
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{
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core.IntALUPortNumbers[j] = Integer.parseInt(intALUElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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}
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core.IntALUPower = getEnergyConfig(intALUElmnt);
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Element intMulElmnt = (Element)(coreElmnt.getElementsByTagName("IntMul")).item(0);
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core.IntMulNum = Integer.parseInt(getImmediateString("Num", intMulElmnt));
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@ -541,6 +542,7 @@ public class XMLParser
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{
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core.IntMulPortNumbers[j] = Integer.parseInt(intMulElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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}
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core.IntMulPower = getEnergyConfig(intMulElmnt);
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Element intDivElmnt = (Element)(coreElmnt.getElementsByTagName("IntDiv")).item(0);
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core.IntDivNum = Integer.parseInt(getImmediateString("Num", intDivElmnt));
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@ -551,6 +553,7 @@ public class XMLParser
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{
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core.IntDivPortNumbers[j] = Integer.parseInt(intDivElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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}
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core.IntDivPower = getEnergyConfig(intDivElmnt);
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Element floatALUElmnt = (Element)(coreElmnt.getElementsByTagName("FloatALU")).item(0);
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core.FloatALUNum = Integer.parseInt(getImmediateString("Num", floatALUElmnt));
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@ -561,6 +564,7 @@ public class XMLParser
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{
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core.FloatALUPortNumbers[j] = Integer.parseInt(floatALUElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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}
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core.FloatALUPower = getEnergyConfig(floatALUElmnt);
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Element floatMulElmnt = (Element)(coreElmnt.getElementsByTagName("FloatMul")).item(0);
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core.FloatMulNum = Integer.parseInt(getImmediateString("Num", floatMulElmnt));
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@ -571,6 +575,7 @@ public class XMLParser
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{
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core.FloatMulPortNumbers[j] = Integer.parseInt(floatMulElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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}
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core.FloatMulPower = getEnergyConfig(floatMulElmnt);
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Element floatDivElmnt = (Element)(coreElmnt.getElementsByTagName("FloatDiv")).item(0);
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core.FloatDivNum = Integer.parseInt(getImmediateString("Num", floatDivElmnt));
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@ -581,30 +586,172 @@ public class XMLParser
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{
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core.FloatDivPortNumbers[j] = Integer.parseInt(floatDivElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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}
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core.FloatDivPower = getEnergyConfig(floatDivElmnt);
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Element jumpElmnt = (Element)(coreElmnt.getElementsByTagName("Jump")).item(0);
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core.JumpNum = Integer.parseInt(getImmediateString("Num", jumpElmnt));
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core.JumpLatency = Integer.parseInt(getImmediateString("Latency", jumpElmnt));
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core.JumpReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", jumpElmnt));
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core.JumpPortNumbers = new int[core.JumpNum];
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for(int j = 0; j < core.JumpNum; j++)
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Element intVectorALUElmnt = (Element)(coreElmnt.getElementsByTagName("IntVectorALU")).item(0);
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core.IntVectorALUNum = Integer.parseInt(getImmediateString("Num", intVectorALUElmnt));
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core.IntVectorALULatency = Integer.parseInt(getImmediateString("Latency", intVectorALUElmnt));
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core.IntVectorALUReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", intVectorALUElmnt));
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core.IntVectorALUPortNumbers = new int[core.IntVectorALUNum];
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for(int j = 0; j < core.IntVectorALUNum; j++)
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{
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core.JumpPortNumbers[j] = Integer.parseInt(jumpElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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core.IntVectorALUPortNumbers[j] = Integer.parseInt(intVectorALUElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
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}
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core.IntVectorALUPower = getEnergyConfig(intVectorALUElmnt);
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Element memoryElmnt = (Element)(coreElmnt.getElementsByTagName("Memory")).item(0);
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core.MemoryNum = Integer.parseInt(getImmediateString("Num", memoryElmnt));
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core.MemoryLatency = Integer.parseInt(getImmediateString("Latency", memoryElmnt));
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core.MemoryReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", memoryElmnt));
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core.MemoryPortNumbers = new int[core.MemoryNum];
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for(int j = 0; j < core.MemoryNum; j++)
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Element intVectorMulElmnt = (Element)(coreElmnt.getElementsByTagName("IntVectorMul")).item(0);
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core.IntVectorMulNum = Integer.parseInt(getImmediateString("Num", intVectorMulElmnt));
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core.IntVectorMulLatency = Integer.parseInt(getImmediateString("Latency", intVectorMulElmnt));
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core.IntVectorMulReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", intVectorMulElmnt));
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core.IntVectorMulPortNumbers = new int[core.IntVectorMulNum];
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for(int j = 0; j < core.IntVectorMulNum; j++)
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{
|
||||
core.MemoryPortNumbers[j] = Integer.parseInt(memoryElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
core.IntVectorMulPortNumbers[j] = Integer.parseInt(intVectorMulElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.IntVectorMulPower = getEnergyConfig(intVectorMulElmnt);
|
||||
|
||||
core.intALUPower = getEnergyConfig(intALUElmnt);
|
||||
core.floatALUPower = getEnergyConfig(floatALUElmnt);
|
||||
core.complexALUPower = getEnergyConfig(intMulElmnt);
|
||||
Element floatVectorALUElmnt = (Element)(coreElmnt.getElementsByTagName("FloatVectorALU")).item(0);
|
||||
core.FloatVectorALUNum = Integer.parseInt(getImmediateString("Num", floatVectorALUElmnt));
|
||||
core.FloatVectorALULatency = Integer.parseInt(getImmediateString("Latency", floatVectorALUElmnt));
|
||||
core.FloatVectorALUReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", floatVectorALUElmnt));
|
||||
core.FloatVectorALUPortNumbers = new int[core.FloatVectorALUNum];
|
||||
for(int j = 0; j < core.FloatVectorALUNum; j++)
|
||||
{
|
||||
core.FloatVectorALUPortNumbers[j] = Integer.parseInt(floatVectorALUElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.FloatVectorALUPower = getEnergyConfig(floatVectorALUElmnt);
|
||||
|
||||
Element floatVectorMulElmnt = (Element)(coreElmnt.getElementsByTagName("FloatVectorMul")).item(0);
|
||||
core.FloatVectorMulNum = Integer.parseInt(getImmediateString("Num", floatVectorMulElmnt));
|
||||
core.FloatVectorMulLatency = Integer.parseInt(getImmediateString("Latency", floatVectorMulElmnt));
|
||||
core.FloatVectorMulReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", floatVectorMulElmnt));
|
||||
core.FloatVectorMulPortNumbers = new int[core.FloatVectorMulNum];
|
||||
for(int j = 0; j < core.FloatVectorMulNum; j++)
|
||||
{
|
||||
core.FloatVectorMulPortNumbers[j] = Integer.parseInt(floatVectorMulElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.FloatVectorMulPower = getEnergyConfig(floatVectorMulElmnt);
|
||||
|
||||
Element FMAElmnt = (Element)(coreElmnt.getElementsByTagName("FMA")).item(0);
|
||||
core.FMANum = Integer.parseInt(getImmediateString("Num", FMAElmnt));
|
||||
core.FMALatency = Integer.parseInt(getImmediateString("Latency", FMAElmnt));
|
||||
core.FMAReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", FMAElmnt));
|
||||
core.FMAPortNumbers = new int[core.FMANum];
|
||||
for(int j = 0; j < core.FMANum; j++)
|
||||
{
|
||||
core.FMAPortNumbers[j] = Integer.parseInt(FMAElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.FMAPower = getEnergyConfig(FMAElmnt);
|
||||
|
||||
Element branchElmnt = (Element)(coreElmnt.getElementsByTagName("Branch")).item(0);
|
||||
core.BranchNum = Integer.parseInt(getImmediateString("Num", branchElmnt));
|
||||
core.BranchLatency = Integer.parseInt(getImmediateString("Latency", branchElmnt));
|
||||
core.BranchReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", branchElmnt));
|
||||
core.BranchPortNumbers = new int[core.BranchNum];
|
||||
for(int j = 0; j < core.BranchNum; j++)
|
||||
{
|
||||
core.BranchPortNumbers[j] = Integer.parseInt(branchElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.BranchPower = getEnergyConfig(branchElmnt);
|
||||
|
||||
Element loadElmnt = (Element)(coreElmnt.getElementsByTagName("Load")).item(0);
|
||||
core.LoadNum = Integer.parseInt(getImmediateString("Num", loadElmnt));
|
||||
core.LoadLatency = Integer.parseInt(getImmediateString("Latency", loadElmnt));
|
||||
core.LoadReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", loadElmnt));
|
||||
core.LoadPortNumbers = new int[core.LoadNum];
|
||||
for(int j = 0; j < core.LoadNum; j++)
|
||||
{
|
||||
core.LoadPortNumbers[j] = Integer.parseInt(loadElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.LoadPower = getEnergyConfig(loadElmnt);
|
||||
|
||||
Element loadAGUElmnt = (Element)(coreElmnt.getElementsByTagName("LoadAGU")).item(0);
|
||||
core.LoadAGUNum = Integer.parseInt(getImmediateString("Num", loadAGUElmnt));
|
||||
core.LoadAGULatency = Integer.parseInt(getImmediateString("Latency", loadAGUElmnt));
|
||||
core.LoadAGUReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", loadAGUElmnt));
|
||||
core.LoadAGUPortNumbers = new int[core.LoadAGUNum];
|
||||
for(int j = 0; j < core.LoadAGUNum; j++)
|
||||
{
|
||||
core.LoadAGUPortNumbers[j] = Integer.parseInt(loadAGUElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.LoadAGUPower = getEnergyConfig(loadAGUElmnt);
|
||||
|
||||
Element storeElmnt = (Element)(coreElmnt.getElementsByTagName("Store")).item(0);
|
||||
core.StoreNum = Integer.parseInt(getImmediateString("Num", storeElmnt));
|
||||
core.StoreLatency = Integer.parseInt(getImmediateString("Latency", storeElmnt));
|
||||
core.StoreReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", storeElmnt));
|
||||
core.StorePortNumbers = new int[core.StoreNum];
|
||||
for(int j = 0; j < core.StoreNum; j++)
|
||||
{
|
||||
core.StorePortNumbers[j] = Integer.parseInt(storeElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.StorePower = getEnergyConfig(storeElmnt);
|
||||
|
||||
Element storeAGUElmnt = (Element)(coreElmnt.getElementsByTagName("StoreAGU")).item(0);
|
||||
core.StoreAGUNum = Integer.parseInt(getImmediateString("Num", storeAGUElmnt));
|
||||
core.StoreAGULatency = Integer.parseInt(getImmediateString("Latency", storeAGUElmnt));
|
||||
core.StoreAGUReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", storeAGUElmnt));
|
||||
core.StoreAGUPortNumbers = new int[core.StoreAGUNum];
|
||||
for(int j = 0; j < core.StoreAGUNum; j++)
|
||||
{
|
||||
core.StoreAGUPortNumbers[j] = Integer.parseInt(storeAGUElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.StoreAGUPower = getEnergyConfig(storeAGUElmnt);
|
||||
|
||||
Element aesElmnt = (Element)(coreElmnt.getElementsByTagName("AES")).item(0);
|
||||
core.AESNum = Integer.parseInt(getImmediateString("Num", aesElmnt));
|
||||
core.AESLatency = Integer.parseInt(getImmediateString("Latency", aesElmnt));
|
||||
core.AESReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", aesElmnt));
|
||||
core.AESPortNumbers = new int[core.AESNum];
|
||||
for(int j = 0; j < core.AESNum; j++)
|
||||
{
|
||||
core.AESPortNumbers[j] = Integer.parseInt(aesElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.AESPower = getEnergyConfig(aesElmnt);
|
||||
|
||||
Element vectorStringElmnt = (Element)(coreElmnt.getElementsByTagName("VectorString")).item(0);
|
||||
core.VectorStringNum = Integer.parseInt(getImmediateString("Num", vectorStringElmnt));
|
||||
core.VectorStringLatency = Integer.parseInt(getImmediateString("Latency", vectorStringElmnt));
|
||||
core.VectorStringReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", vectorStringElmnt));
|
||||
core.VectorStringPortNumbers = new int[core.VectorStringNum];
|
||||
for(int j = 0; j < core.VectorStringNum; j++)
|
||||
{
|
||||
core.VectorStringPortNumbers[j] = Integer.parseInt(vectorStringElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.VectorStringPower = getEnergyConfig(vectorStringElmnt);
|
||||
|
||||
Element bitScanElmnt = (Element)(coreElmnt.getElementsByTagName("BitScan")).item(0);
|
||||
core.BitScanNum = Integer.parseInt(getImmediateString("Num", bitScanElmnt));
|
||||
core.BitScanLatency = Integer.parseInt(getImmediateString("Latency", bitScanElmnt));
|
||||
core.BitScanReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", bitScanElmnt));
|
||||
core.BitScanPortNumbers = new int[core.BitScanNum];
|
||||
for(int j = 0; j < core.BitScanNum; j++)
|
||||
{
|
||||
core.BitScanPortNumbers[j] = Integer.parseInt(bitScanElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.BitScanPower = getEnergyConfig(bitScanElmnt);
|
||||
|
||||
Element vectorShuffleElmnt = (Element)(coreElmnt.getElementsByTagName("VectorShuffle")).item(0);
|
||||
core.VectorShuffleNum = Integer.parseInt(getImmediateString("Num", vectorShuffleElmnt));
|
||||
core.VectorShuffleLatency = Integer.parseInt(getImmediateString("Latency", vectorShuffleElmnt));
|
||||
core.VectorShuffleReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", vectorShuffleElmnt));
|
||||
core.VectorShufflePortNumbers = new int[core.VectorShuffleNum];
|
||||
for(int j = 0; j < core.VectorShuffleNum; j++)
|
||||
{
|
||||
core.VectorShufflePortNumbers[j] = Integer.parseInt(vectorShuffleElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.VectorShufflePower = getEnergyConfig(vectorShuffleElmnt);
|
||||
|
||||
Element leaElmnt = (Element)(coreElmnt.getElementsByTagName("LEA")).item(0);
|
||||
core.LEANum = Integer.parseInt(getImmediateString("Num", leaElmnt));
|
||||
core.LEALatency = Integer.parseInt(getImmediateString("Latency", leaElmnt));
|
||||
core.LEAReciprocalOfThroughput = Integer.parseInt(getImmediateString("ReciprocalOfThroughput", leaElmnt));
|
||||
core.LEAPortNumbers = new int[core.LEANum];
|
||||
for(int j = 0; j < core.LEANum; j++)
|
||||
{
|
||||
core.LEAPortNumbers[j] = Integer.parseInt(leaElmnt.getElementsByTagName("PortNumber").item(j).getFirstChild().getNodeValue());
|
||||
}
|
||||
core.LEAPower = getEnergyConfig(leaElmnt);
|
||||
|
||||
//set Branch Predictor Parameters
|
||||
core.branchPredictor = new BranchPredictorConfig();
|
||||
|
|
|
|||
|
|
@ -245,7 +245,7 @@ TDP = 112W
|
|||
</IntDiv>
|
||||
|
||||
<FloatALU>
|
||||
<Num>1</Num>
|
||||
<Num>0</Num>
|
||||
<Latency>3</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>1</PortNumber>
|
||||
|
|
@ -254,7 +254,7 @@ TDP = 112W
|
|||
</FloatALU>
|
||||
|
||||
<FloatMul>
|
||||
<Num>1</Num>
|
||||
<Num>0</Num>
|
||||
<Latency>5</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
|
|
@ -271,7 +271,69 @@ TDP = 112W
|
|||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</FloatDiv>
|
||||
|
||||
<Jump>
|
||||
<IntVectorALU>
|
||||
<Num>3</Num>
|
||||
<Latency>3</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
<PortNumber>1</PortNumber>
|
||||
<PortNumber>5</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</IntVectorALU>
|
||||
|
||||
<IntVectorMul>
|
||||
<Num>2</Num>
|
||||
<Latency>3</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
<PortNumber>1</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</IntVectorMul>
|
||||
|
||||
<FloatVectorALU>
|
||||
<Num>0</Num>
|
||||
<Latency>3</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
<PortNumber>1</PortNumber>
|
||||
<PortNumber>5</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</FloatVectorALU>
|
||||
|
||||
<FloatVectorMul>
|
||||
<Num>0</Num>
|
||||
<Latency>3</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
<PortNumber>1</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</FloatVectorMul>
|
||||
|
||||
<FMA>
|
||||
<Num>2</Num>
|
||||
<FPALULatency>4</FPALULatency>
|
||||
<FPMulLatency>4</FPMulLatency>
|
||||
<FPVectorALULatency>4</FPVectorALULatency>
|
||||
<FPVectorMulLatency>4</FPVectorMulLatency>
|
||||
<FMALatency>4</FMALatency>
|
||||
<VectorFMALatency>4</VectorFMALatency>
|
||||
<FPALUReciprocalOfThroughput>3</FPALUReciprocalOfThroughput>
|
||||
<FPMulReciprocalOfThroughput>3</FPMulReciprocalOfThroughput>
|
||||
<FPVectorALUReciprocalOfThroughput>3</FPVectorALUReciprocalOfThroughput>
|
||||
<FPVectorMulReciprocalOfThroughput>3</FPVectorMulReciprocalOfThroughput>
|
||||
<FMAReciprocalOfThroughput>3</FMAReciprocalOfThroughput>
|
||||
<VectorFMAReciprocalOfThroughput>3</VectorFMAReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
<PortNumber>1</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</FMA>
|
||||
|
||||
<Branch>
|
||||
<Num>2</Num>
|
||||
<Latency>1</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
|
|
@ -279,19 +341,90 @@ TDP = 112W
|
|||
<PortNumber>6</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</Jump>
|
||||
</Branch>
|
||||
|
||||
<Memory>
|
||||
<Num>4</Num>
|
||||
<Load>
|
||||
<Num>2</Num>
|
||||
<Latency>1</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>2</PortNumber>
|
||||
<PortNumber>3</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</Load>
|
||||
|
||||
<LoadAGU>
|
||||
<Num>2</Num>
|
||||
<Latency>1</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>2</PortNumber>
|
||||
<PortNumber>3</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</LoadAGU>
|
||||
|
||||
<Store>
|
||||
<Num>1</Num>
|
||||
<Latency>1</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>4</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</Store>
|
||||
|
||||
<StoreAGU>
|
||||
<Num>1</Num>
|
||||
<Latency>1</Latency>
|
||||
<ReciprocalOfThroughput>1</ReciprocalOfThroughput>
|
||||
<PortNumber>7</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</Memory>
|
||||
</StoreAGU>
|
||||
|
||||
<AES>
|
||||
<Num>1</Num>
|
||||
<Latency>24</Latency>
|
||||
<ReciprocalOfThroughput>12</ReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</AES>
|
||||
|
||||
<VectorString>
|
||||
<Num>1</Num>
|
||||
<Latency>24</Latency>
|
||||
<ReciprocalOfThroughput>12</ReciprocalOfThroughput>
|
||||
<PortNumber>0</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</VectorString>
|
||||
|
||||
<BitScan>
|
||||
<Num>1</Num>
|
||||
<Latency>24</Latency>
|
||||
<ReciprocalOfThroughput>12</ReciprocalOfThroughput>
|
||||
<PortNumber>1</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</BitScan>
|
||||
|
||||
<VectorShuffle>
|
||||
<Num>1</Num>
|
||||
<Latency>24</Latency>
|
||||
<ReciprocalOfThroughput>12</ReciprocalOfThroughput>
|
||||
<PortNumber>5</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</VectorShuffle>
|
||||
|
||||
<LEA>
|
||||
<Num>1</Num>
|
||||
<Latency>24</Latency>
|
||||
<ReciprocalOfThroughput>12</ReciprocalOfThroughput>
|
||||
<PortNumber>5</PortNumber>
|
||||
<LeakageEnergy>0.0271</LeakageEnergy>
|
||||
<DynamicEnergy>0.6514</DynamicEnergy>
|
||||
</LEA>
|
||||
|
||||
<ResultsBroadcastBus>
|
||||
<LeakageEnergy>0.0239</LeakageEnergy>
|
||||
|
|
|
|||
|
|
@ -1,15 +0,0 @@
|
|||
package emulatorinterface.translator.visaHandler;
|
||||
|
||||
import emulatorinterface.DynamicInstructionBuffer;
|
||||
import generic.Instruction;
|
||||
import generic.InstructionTable;
|
||||
|
||||
public class Mov implements DynamicInstructionHandler
|
||||
{
|
||||
public int handle(int microOpIndex,
|
||||
Instruction microOp, DynamicInstructionBuffer dynamicInstructionBuffer)
|
||||
{
|
||||
//nothing to be done in such cases
|
||||
return ++microOpIndex;
|
||||
}
|
||||
}
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
package emulatorinterface.translator.visaHandler;
|
||||
|
||||
import emulatorinterface.DynamicInstructionBuffer;
|
||||
import generic.Instruction;
|
||||
import generic.InstructionTable;
|
||||
|
||||
public class Xchg implements DynamicInstructionHandler
|
||||
{
|
||||
public int handle(int microOpIndex,
|
||||
Instruction microOp, DynamicInstructionBuffer dynamicInstructionBuffer)
|
||||
{
|
||||
//nothing to be done in such cases
|
||||
return ++microOpIndex;
|
||||
}
|
||||
}
|
||||
|
|
@ -1,63 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.Operand;
|
||||
import generic.InstructionList;
|
||||
import generic.OperandType;
|
||||
|
||||
public class ConvertFloatToInteger implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if((operand1!=null && operand1.getOperandType()==OperandType.integerRegister) &&
|
||||
(operand2!=null && operand2.getOperandType()==OperandType.floatRegister ) &&
|
||||
operand3==null)
|
||||
{
|
||||
instructionArrayList.appendInstruction(Instruction.getMoveInstruction(operand1, operand2));
|
||||
}
|
||||
|
||||
else if((operand1!=null && operand1.getOperandType()==OperandType.integerRegister) &&
|
||||
(operand2!=null && operand2.getOperandType()==OperandType.memory ) &&
|
||||
operand3==null)
|
||||
{
|
||||
// Load from memory to integer register directly
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operand2, operand1));
|
||||
}
|
||||
|
||||
|
||||
else
|
||||
{
|
||||
//misc.Error.showErrorAndExit("incorrect format : " + "\nop1=" + operand1 + "\nop2=" + operand2 + "\nop3=" + operand3);
|
||||
misc.Error.invalidOperation("Convert Floating Point to Integer", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,63 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.Operand;
|
||||
import generic.InstructionList;
|
||||
import generic.OperandType;
|
||||
|
||||
public class ConvertIntegerToFloat implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if((operand1!=null && operand1.getOperandType()==OperandType.floatRegister) &&
|
||||
(operand2!=null && operand2.getOperandType()==OperandType.integerRegister ) &&
|
||||
operand3==null)
|
||||
{
|
||||
instructionArrayList.appendInstruction(Instruction.getMoveInstruction(operand1, operand2));
|
||||
}
|
||||
|
||||
else if((operand1!=null && operand1.getOperandType()==OperandType.floatRegister) &&
|
||||
(operand2!=null && operand2.getOperandType()==OperandType.memory ) &&
|
||||
operand3==null)
|
||||
{
|
||||
// Load from memory to integer register directly
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operand2, operand1));
|
||||
}
|
||||
|
||||
|
||||
else
|
||||
{
|
||||
//misc.Error.showErrorAndExit("incorrect format : " + "\nop1=" + operand1 + "\nop2=" + operand2 + "\nop3=" + operand3);
|
||||
misc.Error.invalidOperation("Convert Integer to Floating point", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -836,7 +836,7 @@ public class InstructionClassTable {
|
|||
|
||||
|
||||
/*
|
||||
* TODO cache directives like flush, no-allocate, prefetch
|
||||
* TODO cache directives like flush, no-allocate
|
||||
* atomic memory operations
|
||||
* input and output from/ to ports
|
||||
* interrupts
|
||||
|
|
|
|||
|
|
@ -1,76 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.Operand;
|
||||
import generic.InstructionList;
|
||||
|
||||
public class SSEALU implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
|
||||
if(operand1.isFloatRegisterOperand() && operand2.isFloatRegisterOperand() &&
|
||||
operand3==null)
|
||||
{
|
||||
//operand1 = operand1 + operand2
|
||||
instructionArrayList.appendInstruction(Instruction.getFloatingPointALU(operand1,
|
||||
operand2, operand1));
|
||||
}
|
||||
|
||||
else if(operand1.isFloatRegisterOperand() && operand2.isFloatRegisterOperand() &&
|
||||
operand3.isFloatRegisterOperand())
|
||||
{
|
||||
//operand1 = operand2 + operand3
|
||||
instructionArrayList.appendInstruction(Instruction.getFloatingPointALU(operand2,
|
||||
operand3, operand1));
|
||||
}
|
||||
|
||||
else if(operand1.isFloatRegisterOperand() && operand2.isMemoryOperand() &&
|
||||
operand3==null)
|
||||
{
|
||||
//tempFloatRegister = [operand2]
|
||||
Operand tempFloatRegister = Registers.getTempFloatReg(tempRegisterNum);
|
||||
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operand2,
|
||||
tempFloatRegister));
|
||||
|
||||
//operand1 = operand1 +/- tempFloatRegister
|
||||
instructionArrayList.appendInstruction(Instruction.getFloatingPointALU(operand1,
|
||||
tempFloatRegister, operand1));
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
misc.Error.invalidOperation("SSE ALU Operation", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,52 +0,0 @@
|
|||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.InstructionList;
|
||||
import generic.Operand;
|
||||
|
||||
public class SSEComparePackedData implements X86StaticInstructionHandler {
|
||||
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if(operand1!=null && operand2!=null && operand3==null) {
|
||||
Operand srcOperand, dstOperand;
|
||||
|
||||
// src operand into temporary
|
||||
if(operand2.isMemoryOperand()) {
|
||||
Operand tmp = Registers.getTempFloatReg(tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(
|
||||
Instruction.getLoadInstruction(operand2, tmp));
|
||||
srcOperand = tmp;
|
||||
} else {
|
||||
srcOperand = operand2;
|
||||
}
|
||||
|
||||
// dst operand into temporary
|
||||
if(operand1.isMemoryOperand()) {
|
||||
Operand tmp = Registers.getTempFloatReg(tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(
|
||||
Instruction.getLoadInstruction(operand1, tmp));
|
||||
dstOperand = tmp;
|
||||
} else {
|
||||
dstOperand = operand1;
|
||||
}
|
||||
|
||||
// perform the floating point compare
|
||||
instructionArrayList.appendInstruction(
|
||||
Instruction.getFloatingPointALU(srcOperand, dstOperand, dstOperand));
|
||||
|
||||
// if the original destination operand was memory, then store the result back
|
||||
if(operand1.isMemoryOperand()) {
|
||||
instructionArrayList.appendInstruction(
|
||||
Instruction.getStoreInstruction(operand1, dstOperand));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,67 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.InstructionLinkedList;
|
||||
import generic.Operand;
|
||||
import generic.InstructionList;
|
||||
|
||||
public class SSEDivision implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if(operand1.isFloatRegisterOperand() && operand2.isFloatRegisterOperand() &&
|
||||
operand3==null)
|
||||
{
|
||||
//operand1 = operand1 / operand2
|
||||
instructionArrayList.appendInstruction(Instruction.getFloatingPointDivision(operand1,
|
||||
operand2, operand1));
|
||||
}
|
||||
|
||||
else if(operand1.isFloatRegisterOperand() && operand2.isMemoryOperand() &&
|
||||
operand3==null)
|
||||
{
|
||||
//tempFloatRegister = [operand2]
|
||||
Operand tempFloatRegister = Registers.getTempFloatReg(tempRegisterNum);
|
||||
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operand2,
|
||||
tempFloatRegister));
|
||||
|
||||
//operand1 = operand1 / tempFloatRegister
|
||||
instructionArrayList.appendInstruction(Instruction.getFloatingPointDivision(operand1,
|
||||
tempFloatRegister, operand1));
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
misc.Error.invalidOperation("SSE Division", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.InstructionLinkedList;
|
||||
import generic.Operand;
|
||||
import generic.InstructionList;
|
||||
|
||||
public class SSEMove implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if(operand1.isFloatRegisterOperand() && operand2.isFloatRegisterOperand()
|
||||
&& operand3==null)
|
||||
{
|
||||
//If both operands are registers use a simple move operation.
|
||||
instructionArrayList.appendInstruction(Instruction.getMoveInstruction(operand1,
|
||||
operand2));
|
||||
}
|
||||
|
||||
else if(operand1.isFloatRegisterOperand() && operand2.isMemoryOperand()
|
||||
&& operand3==null)
|
||||
{
|
||||
//If the source operand is a memory location then use a load operation
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operand2,
|
||||
operand1));
|
||||
}
|
||||
|
||||
else if(operand1.isMemoryOperand() && operand2.isFloatRegisterOperand()
|
||||
&& operand3==null)
|
||||
{
|
||||
//If the destination operand is a memory location, its a store operation
|
||||
instructionArrayList.appendInstruction(Instruction.getStoreInstruction(operand1,
|
||||
operand2));
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
misc.Error.invalidOperation("SSE Move", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,66 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.InstructionLinkedList;
|
||||
import generic.Operand;
|
||||
import generic.InstructionList;
|
||||
|
||||
public class SSEMultiplication implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if(operand1.isFloatRegisterOperand() && operand2.isFloatRegisterOperand() &&
|
||||
operand3==null)
|
||||
{
|
||||
//operand1 = operand1 * operand2
|
||||
instructionArrayList.appendInstruction(Instruction.getFloatingPointMultiplication(operand1,
|
||||
operand2, operand1));
|
||||
}
|
||||
|
||||
else if(operand1.isFloatRegisterOperand() && operand2.isMemoryOperand() &&
|
||||
operand3==null)
|
||||
{
|
||||
//tempFloatRegister = [operand2]
|
||||
Operand tempFloatRegister = Registers.getTempFloatReg(tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operand2,
|
||||
tempFloatRegister));
|
||||
|
||||
//operand1 = operand1 * tempFloatRegister
|
||||
instructionArrayList.appendInstruction(Instruction.getFloatingPointMultiplication(operand1,
|
||||
tempFloatRegister, operand1));
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
misc.Error.invalidOperation("SSE Multiplication", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,67 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.operand.OperandTranslator;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.Operand;
|
||||
import generic.InstructionList;
|
||||
|
||||
public class ShiftOperationThreeOperand implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if(
|
||||
(operand1.isIntegerRegisterOperand() || operand1.isMemoryOperand()) &&
|
||||
(operand2.isIntegerRegisterOperand()) &&
|
||||
(operand3.isIntegerRegisterOperand() || operand3.isImmediateOperand()))
|
||||
{
|
||||
Operand destination;
|
||||
if(operand1.isMemoryOperand())
|
||||
{
|
||||
destination = OperandTranslator.getLocationToStoreValue(operand1, tempRegisterNum);
|
||||
}
|
||||
else
|
||||
{
|
||||
destination = operand1;
|
||||
}
|
||||
|
||||
instructionArrayList.appendInstruction(Instruction.getIntALUInstruction(
|
||||
operand2, operand3, destination));
|
||||
|
||||
if(operand1.isMemoryOperand())
|
||||
{
|
||||
instructionArrayList.appendInstruction(Instruction.getStoreInstruction(operand1, destination));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
misc.Error.invalidOperation("Shift operation three operands", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,74 +0,0 @@
|
|||
/*****************************************************************************
|
||||
Tejas Simulator
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Copyright [2010] [Indian Institute of Technology, Delhi]
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
------------------------------------------------------------------------------------------------------------
|
||||
|
||||
Contributors: Prathmesh Kallurkar
|
||||
*****************************************************************************/
|
||||
|
||||
package emulatorinterface.translator.x86.instruction;
|
||||
|
||||
import emulatorinterface.translator.InvalidInstructionException;
|
||||
import emulatorinterface.translator.x86.operand.OperandTranslator;
|
||||
import emulatorinterface.translator.x86.registers.TempRegisterNum;
|
||||
import generic.Instruction;
|
||||
import generic.Operand;
|
||||
import generic.InstructionLinkedList;
|
||||
import generic.InstructionList;
|
||||
|
||||
public class SingleOperandIntALU implements X86StaticInstructionHandler
|
||||
{
|
||||
public void handle(long instructionPointer,
|
||||
Operand operand1, Operand operand2, Operand operand3,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
throws InvalidInstructionException
|
||||
{
|
||||
if(
|
||||
(operand1.isIntegerRegisterOperand() || operand1.isMemoryOperand()) &&
|
||||
operand2==null && operand3==null)
|
||||
{
|
||||
Operand operand1ValueOperand;
|
||||
|
||||
//get value-operand for operand1
|
||||
if(operand1.isMemoryOperand())
|
||||
{
|
||||
operand1ValueOperand = OperandTranslator.getLocationToStoreValue(operand1, tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operand1, operand1ValueOperand));
|
||||
}
|
||||
else
|
||||
{
|
||||
operand1ValueOperand = operand1;
|
||||
}
|
||||
|
||||
|
||||
//Perform integer alu operation
|
||||
instructionArrayList.appendInstruction(Instruction.getIntALUInstruction(
|
||||
null, operand1ValueOperand, operand1ValueOperand));
|
||||
|
||||
|
||||
//If operand1 is a memory operand, then perform a store operation too
|
||||
if(operand1.isMemoryOperand())
|
||||
{
|
||||
instructionArrayList.appendInstruction(Instruction.getStoreInstruction(operand1, operand1ValueOperand));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
misc.Error.invalidOperation("Integer ALU Operation involving a single operand !!", operand1, operand2, operand3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -104,7 +104,7 @@ public class ObjParser
|
|||
|
||||
// Branch address
|
||||
Operand branchAddress = Operand.getImmediateOperand();
|
||||
staticBranchMicroOp = Instruction.getBranchInstruction(branchAddress);
|
||||
staticBranchMicroOp = Instruction.getBranchInstruction(branchAddress, Registers.getEFlagsRegister());
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -157,8 +157,7 @@ public class OperandTranslator
|
|||
{
|
||||
misc.Error.showErrorAndExit("\n\tIllegal arguments to a memory address : "
|
||||
+ operandStr + " !!");
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
Operand base, offset, index,scale;
|
||||
String indexStr = null, scaleStr = null;
|
||||
|
|
@ -353,4 +352,40 @@ public class OperandTranslator
|
|||
|
||||
return tempMemoryRegister;
|
||||
}
|
||||
|
||||
public static Operand processSourceMemoryOperand(Operand sourceOperand,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum,
|
||||
boolean loadingInteger)
|
||||
{
|
||||
Operand operandAddressOperand = OperandTranslator.getLocationToStoreValue(sourceOperand, tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadAGUInstruction(sourceOperand.getMemoryLocationFirstOperand(), sourceOperand.getMemoryLocationSecondOperand(), operandAddressOperand));
|
||||
Operand operandValueOperand;
|
||||
if(loadingInteger)
|
||||
operandValueOperand = Registers.getTempIntReg(tempRegisterNum);
|
||||
else
|
||||
operandValueOperand = Registers.getTempFloatReg(tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operandAddressOperand, operandValueOperand));
|
||||
return operandValueOperand;
|
||||
}
|
||||
|
||||
public static void processSourceMemoryOperand(Operand sourceOperand,
|
||||
Operand destinationOperand,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
{
|
||||
Operand operandAddressOperand = OperandTranslator.getLocationToStoreValue(sourceOperand, tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadAGUInstruction(sourceOperand.getMemoryLocationFirstOperand(), sourceOperand.getMemoryLocationSecondOperand(), operandAddressOperand));
|
||||
instructionArrayList.appendInstruction(Instruction.getLoadInstruction(operandAddressOperand, destinationOperand));
|
||||
}
|
||||
|
||||
public static void processDestinationMemoryOperand(Operand sourceOperand,
|
||||
Operand destinationOperand,
|
||||
InstructionList instructionArrayList,
|
||||
TempRegisterNum tempRegisterNum)
|
||||
{
|
||||
Operand operandAddressOperand = OperandTranslator.getLocationToStoreValue(destinationOperand, tempRegisterNum);
|
||||
instructionArrayList.appendInstruction(Instruction.getStoreAGUInstruction(destinationOperand.getMemoryLocationFirstOperand(), destinationOperand.getMemoryLocationSecondOperand(), operandAddressOperand));
|
||||
instructionArrayList.appendInstruction(Instruction.getStoreInstruction(operandAddressOperand, sourceOperand));
|
||||
}
|
||||
}
|
||||
|
|
@ -168,6 +168,7 @@ public class Registers
|
|||
floatRegistersHashTable.put("tempFloat1", new Long(26));
|
||||
floatRegistersHashTable.put("tempFloat2", new Long(27));
|
||||
floatRegistersHashTable.put("tempFloat3", new Long(28));
|
||||
floatRegistersHashTable.put("MXCSR", new Long(29));
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -315,6 +316,11 @@ public class Registers
|
|||
{
|
||||
return Operand.getIntegerRegister(encodeRegister("rax"));
|
||||
}
|
||||
|
||||
public static Operand getDataRegister()
|
||||
{
|
||||
return Operand.getIntegerRegister(encodeRegister("rdx"));
|
||||
}
|
||||
|
||||
public static Operand getTopFPRegister()
|
||||
{
|
||||
|
|
@ -389,11 +395,26 @@ public class Registers
|
|||
return Operand.getIntegerRegister(encodeRegister("rbp"));
|
||||
}
|
||||
|
||||
public static Operand getBaseIndexRegister()
|
||||
{
|
||||
return Operand.getIntegerRegister(encodeRegister("rbx"));
|
||||
}
|
||||
|
||||
public static Operand getEFlagsRegister()
|
||||
{
|
||||
return Operand.getIntegerRegister(encodeRegister("eflags"));
|
||||
}
|
||||
|
||||
public static Operand getFloatingPointControlWord()
|
||||
{
|
||||
return Operand.getIntegerRegister(encodeRegister("FP_CWORD"));
|
||||
}
|
||||
|
||||
public static Operand getMXCSR()
|
||||
{
|
||||
return Operand.getFloatRegister(encodeRegister("MXCSR"));
|
||||
}
|
||||
|
||||
public static int getMaxIntegerRegisters() {
|
||||
checkAndCreateRegisterHashTable();
|
||||
return integerRegistersHashTable.size();
|
||||
|
|
|
|||
|
|
@ -207,16 +207,16 @@ public class Core extends SimulationElement{
|
|||
return coreConfig.DecodeWidth;
|
||||
}
|
||||
|
||||
public int getFloatingPointRegisterFileSize() {
|
||||
return coreConfig.FloatRegFileSize;
|
||||
public int getVectorRegisterFileSize() {
|
||||
return coreConfig.VectorRegFileSize;
|
||||
}
|
||||
|
||||
public int getIntegerRegisterFileSize() {
|
||||
return coreConfig.IntRegFileSize;
|
||||
}
|
||||
|
||||
public int getNFloatingPointArchitecturalRegisters() {
|
||||
return coreConfig.FloatArchRegNum;
|
||||
public int getNVectorArchitecturalRegisters() {
|
||||
return coreConfig.VectorArchRegNum;
|
||||
}
|
||||
|
||||
public int getNIntegerArchitecturalRegisters() {
|
||||
|
|
@ -327,8 +327,8 @@ public class Core extends SimulationElement{
|
|||
return coreConfig.intFreeListPower;
|
||||
}
|
||||
|
||||
public EnergyConfig getFpFreeListPower() {
|
||||
return coreConfig.floatFreeListPower;
|
||||
public EnergyConfig getVectorFreeListPower() {
|
||||
return coreConfig.vectorFreeListPower;
|
||||
}
|
||||
|
||||
public EnergyConfig getLsqPower() {
|
||||
|
|
@ -339,8 +339,8 @@ public class Core extends SimulationElement{
|
|||
return coreConfig.intRegFilePower;
|
||||
}
|
||||
|
||||
public EnergyConfig getFpRegFilePower() {
|
||||
return coreConfig.floatRegFilePower;
|
||||
public EnergyConfig getVectorRegFilePower() {
|
||||
return coreConfig.vectorRegFilePower;
|
||||
}
|
||||
|
||||
public EnergyConfig getIwPower() {
|
||||
|
|
@ -351,18 +351,6 @@ public class Core extends SimulationElement{
|
|||
return coreConfig.robPower;
|
||||
}
|
||||
|
||||
public EnergyConfig getIntALUPower() {
|
||||
return coreConfig.intALUPower;
|
||||
}
|
||||
|
||||
public EnergyConfig getFloatALUPower() {
|
||||
return coreConfig.floatALUPower;
|
||||
}
|
||||
|
||||
public EnergyConfig getComplexALUPower() {
|
||||
return coreConfig.complexALUPower;
|
||||
}
|
||||
|
||||
public EnergyConfig getResultsBroadcastBusPower() {
|
||||
return coreConfig.resultsBroadcastBusPower;
|
||||
}
|
||||
|
|
@ -374,6 +362,10 @@ public class Core extends SimulationElement{
|
|||
public EnergyConfig getdTLBPower() {
|
||||
return coreConfig.dTLBPower;
|
||||
}
|
||||
|
||||
public CoreConfig getCoreConfig() {
|
||||
return coreConfig;
|
||||
}
|
||||
|
||||
public void setComInterface(CommunicationInterface comInterface) {
|
||||
this.comInterface = comInterface;
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ package generic;
|
|||
|
||||
import java.io.Serializable;
|
||||
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import main.CustomObjectPool;
|
||||
|
||||
public class Instruction implements Serializable
|
||||
|
|
@ -146,13 +147,6 @@ public class Instruction implements Serializable
|
|||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getMoveInstruction(Operand destinationOperand, Operand sourceOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.mov, sourceOperand, null, destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getNOPInstruction()
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
|
|
@ -178,13 +172,6 @@ public class Instruction implements Serializable
|
|||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getExchangeInstruction(Operand operand1, Operand operand2)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.xchg, operand1, operand2, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getInterruptInstruction(Operand interruptNumber)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
|
|
@ -219,11 +206,67 @@ public class Instruction implements Serializable
|
|||
return ins;
|
||||
}
|
||||
|
||||
|
||||
public static Instruction getBranchInstruction(Operand newInstructionAddress)
|
||||
public static Instruction getIntVectorALU(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.branch, newInstructionAddress, null, null);
|
||||
ins.set(OperationType.integerVectorALU, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getIntVectorMul(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.integerVectorMul, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getFloatVectorALU(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.floatVectorALU, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getFloatVectorMul(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.floatVectorMul, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
/*
|
||||
* dest = dest + (src1 * src2)
|
||||
*/
|
||||
public static Instruction getFMA(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.FMA, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getVectorFMA(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.vectorFMA, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getBranchInstruction(Operand newInstructionAddress, Operand EFlagsRegister)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.branch, newInstructionAddress, EFlagsRegister, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
|
|
@ -241,6 +284,13 @@ public class Instruction implements Serializable
|
|||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getLoadAGUInstruction(Operand sourceOperand1, Operand sourceOperand2, Operand destinationRegister)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.loadAGU, sourceOperand1, sourceOperand2, destinationRegister);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getStoreInstruction(Operand memoryLocation, Operand sourceOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
|
|
@ -248,6 +298,99 @@ public class Instruction implements Serializable
|
|||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getStoreAGUInstruction(Operand sourceOperand1, Operand sourceOperand2, Operand destinationRegister)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.storeAGU, sourceOperand1, sourceOperand2, destinationRegister);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getAES(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)//TODO AES is 2 operand or 3 operand?
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.AES, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getVectorString(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.vectorString, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getBitScan(Operand sourceOperand1, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.bitScan, sourceOperand1, null,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getVectorShuffle(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.vectorShuffle, sourceOperand1, sourceOperand2,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getLEA(Operand sourceOperand1,
|
||||
Operand sourceOperand2, Operand destinationOperand)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.LEA, sourceOperand1, null,
|
||||
destinationOperand);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getCPUIDInstruction()
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.cpuid, null, null, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getMFenceInstruction()
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.mfence, null, null, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getSFenceInstruction()
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.sfence, null, null, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getLFenceInstruction()
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.lfence, null, null, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getReadPrefetch(Operand memoryLocation, Operand cacheLevelToPrefetchTo)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.read_prefetch, memoryLocation, cacheLevelToPrefetchTo, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public static Instruction getWritePrefetch(Operand memoryLocation)
|
||||
{
|
||||
Instruction ins = CustomObjectPool.getInstructionPool().borrowObject();
|
||||
ins.set(OperationType.write_prefetch, memoryLocation, null, null);
|
||||
return ins;
|
||||
}
|
||||
|
||||
public long getCISCProgramCounter()
|
||||
{
|
||||
return ciscProgramCounter;
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@ public class Operand implements Serializable
|
|||
floatRegisterOperands = new Operand[Registers.getMaxFloatRegisters()];
|
||||
for(int i=0; i<Registers.getMaxFloatRegisters(); i++) {
|
||||
floatRegisterOperands[i] = new Operand();
|
||||
floatRegisterOperands[i].type = OperandType.floatRegister;
|
||||
floatRegisterOperands[i].type = OperandType.vectorRegister;
|
||||
floatRegisterOperands[i].value = i;
|
||||
}
|
||||
|
||||
|
|
@ -241,7 +241,7 @@ public class Operand implements Serializable
|
|||
|
||||
public boolean isFloatRegisterOperand()
|
||||
{
|
||||
return (this.type == OperandType.floatRegister);
|
||||
return (this.type == OperandType.vectorRegister);
|
||||
}
|
||||
|
||||
private void set(OperandType operandType, long operandValue)
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ package generic;
|
|||
public enum OperandType
|
||||
{
|
||||
integerRegister,
|
||||
floatRegister,
|
||||
vectorRegister,
|
||||
immediate,
|
||||
inValid,
|
||||
memory
|
||||
|
|
|
|||
|
|
@ -31,14 +31,36 @@ public enum OperationType
|
|||
floatALU,
|
||||
floatMul,
|
||||
floatDiv,
|
||||
integerVectorALU,
|
||||
integerVectorMul,
|
||||
floatVectorALU,
|
||||
floatVectorMul,
|
||||
FMA,
|
||||
vectorFMA,
|
||||
load,
|
||||
loadAGU,
|
||||
store,
|
||||
storeAGU,
|
||||
jump,
|
||||
branch,
|
||||
mov,
|
||||
xchg,
|
||||
//integerMov,
|
||||
//floatMov,
|
||||
//xchg,
|
||||
AES,
|
||||
vectorString,
|
||||
bitScan,
|
||||
vectorShuffle,
|
||||
LEA,
|
||||
acceleratedOp,
|
||||
nop,
|
||||
|
||||
cpuid,
|
||||
mfence,
|
||||
sfence,
|
||||
lfence,
|
||||
|
||||
read_prefetch,
|
||||
write_prefetch,
|
||||
//TODO Software interrupt can also be modelled as a far jump
|
||||
interrupt,
|
||||
no_of_types,
|
||||
|
|
|
|||
|
|
@ -345,6 +345,8 @@ public class Statistics {
|
|||
outputFileWriter.write("Memory Requests\t=\t" + coreMemSys[i].getNumberOfMemoryRequests() + "\n");
|
||||
outputFileWriter.write("Loads\t\t=\t" + coreMemSys[i].getNumberOfLoads() + "\n");
|
||||
outputFileWriter.write("Stores\t\t=\t" + coreMemSys[i].getNumberOfStores() + "\n");
|
||||
outputFileWriter.write("Software read prefetches\t\t=\t" + coreMemSys[i].getNumberOfSoftwareReadPrefetches() + "\n");
|
||||
outputFileWriter.write("Software write prefetches\t\t=\t" + coreMemSys[i].getNumberOfSoftwareWritePrefetches() + "\n");
|
||||
outputFileWriter.write("LSQ forwardings\t=\t" + coreMemSys[i].getNumberOfValueForwardings() + "\n");
|
||||
|
||||
printCacheStatistics("iTLB[" + i + "]", coreMemSys[i].getiTLB().getTlbHits(), coreMemSys[i].getiTLB().getTlbMisses());
|
||||
|
|
|
|||
|
|
@ -239,7 +239,9 @@ public abstract class CoreMemorySystem extends SimulationElement
|
|||
|
||||
public abstract long getNumberOfMemoryRequests();
|
||||
public abstract long getNumberOfLoads();
|
||||
public abstract long getNumberOfStores();
|
||||
public abstract long getNumberOfStores();
|
||||
public abstract long getNumberOfSoftwareReadPrefetches();
|
||||
public abstract long getNumberOfSoftwareWritePrefetches();
|
||||
public abstract long getNumberOfValueForwardings();
|
||||
public abstract void setNumberOfMemoryRequests(long numMemoryRequests);
|
||||
public abstract void setNumberOfLoads(long numLoads);
|
||||
|
|
|
|||
|
|
@ -46,6 +46,8 @@ public class LSQ extends SimulationElement
|
|||
public long noOfMemRequests = 0;
|
||||
public long NoOfLd = 0;
|
||||
public long NoOfSt = 0;
|
||||
public long NoOfSoftwareReadPrefetch = 0;
|
||||
public long NoOfSoftwareWritePrefetch = 0;
|
||||
public long NoOfForwards = 0; // Total number of forwards made by the LSQ
|
||||
|
||||
long numAccesses;
|
||||
|
|
|
|||
|
|
@ -16,10 +16,6 @@ public class ExecutionCore {
|
|||
boolean[] portUsedThisCycle;
|
||||
int numPorts;
|
||||
|
||||
long numIntALUAccesses;
|
||||
long numFloatALUAccesses;
|
||||
long numComplexALUAccesses;
|
||||
|
||||
public ExecutionCore(Core core)
|
||||
{
|
||||
this.core = core;
|
||||
|
|
@ -29,75 +25,297 @@ public class ExecutionCore {
|
|||
FUs = new FunctionalUnit[FunctionalUnitType.values().length][];
|
||||
|
||||
//int ALUs
|
||||
FUs[FunctionalUnitType.integerALU.ordinal()] = new FunctionalUnit[coreConfig.IntALUNum];
|
||||
for(int i = 0; i < coreConfig.IntALUNum; i++)
|
||||
if(coreConfig.IntALUNum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerALU, coreConfig.IntALULatency,
|
||||
coreConfig.IntALUReciprocalOfThroughput, coreConfig.IntALUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerALU.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.integerALU.ordinal()] = new FunctionalUnit[coreConfig.IntALUNum];
|
||||
for(int i = 0; i < coreConfig.IntALUNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.IntALULatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.IntALUReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerALU, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.IntALUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerALU.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//int Muls
|
||||
FUs[FunctionalUnitType.integerMul.ordinal()] = new FunctionalUnit[coreConfig.IntMulNum];
|
||||
for(int i = 0; i < coreConfig.IntMulNum; i++)
|
||||
if(coreConfig.IntMulNum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerMul, coreConfig.IntMulLatency,
|
||||
coreConfig.IntMulReciprocalOfThroughput, coreConfig.IntMulPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerMul.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.integerMul.ordinal()] = new FunctionalUnit[coreConfig.IntMulNum];
|
||||
for(int i = 0; i < coreConfig.IntMulNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.IntMulLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.IntMulReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerMul, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.IntMulPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerMul.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//int Divs
|
||||
FUs[FunctionalUnitType.integerDiv.ordinal()] = new FunctionalUnit[coreConfig.IntDivNum];
|
||||
for(int i = 0; i < coreConfig.IntDivNum; i++)
|
||||
if(coreConfig.IntDivNum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerDiv, coreConfig.IntDivLatency,
|
||||
coreConfig.IntDivReciprocalOfThroughput, coreConfig.IntDivPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerDiv.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.integerDiv.ordinal()] = new FunctionalUnit[coreConfig.IntDivNum];
|
||||
for(int i = 0; i < coreConfig.IntDivNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.IntDivLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.IntDivReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerDiv, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.IntDivPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerDiv.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//float ALUs
|
||||
FUs[FunctionalUnitType.floatALU.ordinal()] = new FunctionalUnit[coreConfig.FloatALUNum];
|
||||
for(int i = 0; i < coreConfig.FloatALUNum; i++)
|
||||
if(coreConfig.FloatALUNum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatALU, coreConfig.FloatALULatency,
|
||||
coreConfig.FloatALUReciprocalOfThroughput, coreConfig.FloatALUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatALU.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.floatALU.ordinal()] = new FunctionalUnit[coreConfig.FloatALUNum];
|
||||
for(int i = 0; i < coreConfig.FloatALUNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.FloatALULatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.FloatALUReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatALU, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.FloatALUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatALU.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//float Muls
|
||||
FUs[FunctionalUnitType.floatMul.ordinal()] = new FunctionalUnit[coreConfig.FloatMulNum];
|
||||
for(int i = 0; i < coreConfig.FloatMulNum; i++)
|
||||
if(coreConfig.FloatMulNum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatMul, coreConfig.FloatMulLatency,
|
||||
coreConfig.FloatMulReciprocalOfThroughput, coreConfig.FloatMulPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatMul.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.floatMul.ordinal()] = new FunctionalUnit[coreConfig.FloatMulNum];
|
||||
for(int i = 0; i < coreConfig.FloatMulNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.FloatMulLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.FloatMulReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatMul, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.FloatMulPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatMul.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//float Divs
|
||||
FUs[FunctionalUnitType.floatDiv.ordinal()] = new FunctionalUnit[coreConfig.FloatDivNum];
|
||||
for(int i = 0; i < coreConfig.FloatDivNum; i++)
|
||||
if(coreConfig.FloatDivNum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatDiv, coreConfig.FloatDivLatency,
|
||||
coreConfig.FloatDivReciprocalOfThroughput, coreConfig.FloatDivPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatDiv.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.floatDiv.ordinal()] = new FunctionalUnit[coreConfig.FloatDivNum];
|
||||
for(int i = 0; i < coreConfig.FloatDivNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.FloatDivLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.FloatDivReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatDiv, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.FloatDivPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatDiv.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//jump
|
||||
FUs[FunctionalUnitType.jump.ordinal()] = new FunctionalUnit[coreConfig.JumpNum];
|
||||
for(int i = 0; i < coreConfig.JumpNum; i++)
|
||||
//FMA
|
||||
if(coreConfig.FMANum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.jump, coreConfig.JumpLatency,
|
||||
coreConfig.JumpReciprocalOfThroughput, coreConfig.JumpPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.jump.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.FMA.ordinal()] = new FunctionalUnit[coreConfig.FMANum];
|
||||
for(int i = 0; i < coreConfig.FMANum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.FloatALULatency, coreConfig.FloatMulLatency, coreConfig.FloatVectorALULatency, coreConfig.FloatVectorMulLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.FloatALUReciprocalOfThroughput, coreConfig.FloatMulReciprocalOfThroughput, coreConfig.FloatVectorALUReciprocalOfThroughput, coreConfig.FloatVectorMulReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.FMA, 4, latency,
|
||||
reciprocalOfThroughput, coreConfig.FMAPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.FMA.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//memory
|
||||
FUs[FunctionalUnitType.memory.ordinal()] = new FunctionalUnit[coreConfig.MemoryNum];
|
||||
for(int i = 0; i < coreConfig.MemoryNum; i++)
|
||||
//int vector ALUs
|
||||
if(coreConfig.IntVectorALUNum > 0)
|
||||
{
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.memory, coreConfig.MemoryLatency,
|
||||
coreConfig.MemoryReciprocalOfThroughput, coreConfig.MemoryPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.memory.ordinal()][i] = FU;
|
||||
FUs[FunctionalUnitType.integerVectorALU.ordinal()] = new FunctionalUnit[coreConfig.IntVectorALUNum];
|
||||
for(int i = 0; i < coreConfig.IntVectorALUNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.IntVectorALULatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.IntVectorALUReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerVectorALU, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.IntVectorALUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerVectorALU.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//int vector Muls
|
||||
if(coreConfig.IntVectorMulNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.integerVectorMul.ordinal()] = new FunctionalUnit[coreConfig.IntVectorMulNum];
|
||||
for(int i = 0; i < coreConfig.IntVectorMulNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.IntVectorMulLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.IntVectorMulReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.integerVectorMul, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.IntVectorMulPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.integerVectorMul.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//float vector ALUs
|
||||
if(coreConfig.FloatVectorALUNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.floatVectorALU.ordinal()] = new FunctionalUnit[coreConfig.FloatVectorALUNum];
|
||||
for(int i = 0; i < coreConfig.FloatVectorALUNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.FloatVectorALULatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.FloatVectorALUReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatVectorALU, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.FloatVectorALUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatVectorALU.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//float vector Muls
|
||||
if(coreConfig.FloatVectorMulNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.floatVectorMul.ordinal()] = new FunctionalUnit[coreConfig.FloatVectorMulNum];
|
||||
for(int i = 0; i < coreConfig.FloatVectorMulNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.FloatVectorMulLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.FloatVectorMulReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.floatVectorMul, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.FloatVectorMulPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.floatVectorMul.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//branch
|
||||
if(coreConfig.BranchNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.branch.ordinal()] = new FunctionalUnit[coreConfig.BranchNum];
|
||||
for(int i = 0; i < coreConfig.BranchNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.BranchLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.BranchReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.branch, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.BranchPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.branch.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//load
|
||||
if(coreConfig.LoadNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.load.ordinal()] = new FunctionalUnit[coreConfig.LoadNum];
|
||||
for(int i = 0; i < coreConfig.LoadNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.LoadLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.LoadReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.load, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.LoadPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.load.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//load AGU
|
||||
if(coreConfig.LoadAGUNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.loadAGU.ordinal()] = new FunctionalUnit[coreConfig.LoadAGUNum];
|
||||
for(int i = 0; i < coreConfig.LoadAGUNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.LoadAGULatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.LoadAGUReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.loadAGU, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.LoadAGUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.loadAGU.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//load
|
||||
if(coreConfig.StoreNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.store.ordinal()] = new FunctionalUnit[coreConfig.StoreNum];
|
||||
for(int i = 0; i < coreConfig.StoreNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.StoreLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.StoreReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.store, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.StorePortNumbers[i]);
|
||||
FUs[FunctionalUnitType.store.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//load AGU
|
||||
if(coreConfig.StoreAGUNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.storeAGU.ordinal()] = new FunctionalUnit[coreConfig.StoreAGUNum];
|
||||
for(int i = 0; i < coreConfig.StoreAGUNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.StoreAGULatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.StoreAGUReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.storeAGU, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.StoreAGUPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.storeAGU.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//AES
|
||||
if(coreConfig.AESNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.AES.ordinal()] = new FunctionalUnit[coreConfig.AESNum];
|
||||
for(int i = 0; i < coreConfig.AESNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.AESLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.AESReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.AES, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.AESPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.AES.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//Vector String
|
||||
if(coreConfig.VectorStringNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.vectorString.ordinal()] = new FunctionalUnit[coreConfig.VectorStringNum];
|
||||
for(int i = 0; i < coreConfig.VectorStringNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.VectorStringLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.VectorStringReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.vectorString, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.VectorStringPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.vectorString.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//bit scan
|
||||
if(coreConfig.BitScanNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.bitScan.ordinal()] = new FunctionalUnit[coreConfig.BitScanNum];
|
||||
for(int i = 0; i < coreConfig.BitScanNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.BitScanLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.BitScanReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.bitScan, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.BitScanPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.bitScan.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//vector shuffle
|
||||
if(coreConfig.VectorShuffleNum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.vectorShuffle.ordinal()] = new FunctionalUnit[coreConfig.VectorShuffleNum];
|
||||
for(int i = 0; i < coreConfig.VectorShuffleNum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.VectorShuffleLatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.VectorShuffleReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.vectorShuffle, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.VectorShufflePortNumbers[i]);
|
||||
FUs[FunctionalUnitType.vectorShuffle.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
//LEA
|
||||
if(coreConfig.LEANum > 0)
|
||||
{
|
||||
FUs[FunctionalUnitType.LEA.ordinal()] = new FunctionalUnit[coreConfig.LEANum];
|
||||
for(int i = 0; i < coreConfig.LEANum; i++)
|
||||
{
|
||||
int[] latency = {coreConfig.LEALatency};
|
||||
int[] reciprocalOfThroughput = {coreConfig.LEAReciprocalOfThroughput};
|
||||
FunctionalUnit FU = new FunctionalUnit(FunctionalUnitType.LEA, 1, latency,
|
||||
reciprocalOfThroughput, coreConfig.LEAPortNumbers[i]);
|
||||
FUs[FunctionalUnitType.LEA.ordinal()][i] = FU;
|
||||
}
|
||||
}
|
||||
|
||||
this.numPorts = coreConfig.ExecutionCoreNumPorts;
|
||||
|
|
@ -108,12 +326,17 @@ public class ExecutionCore {
|
|||
// negative of the FU instance is returned
|
||||
//else, the earliest time, at which an FU of the type becomes available, is returned
|
||||
|
||||
public long requestFU(FunctionalUnitType FUType)
|
||||
public long requestFU(FunctionalUnitType FUType, int functionality)
|
||||
{
|
||||
if(FUs[FUType.ordinal()] == null || FUs[FUType.ordinal()].length == 0)
|
||||
{
|
||||
return Long.MAX_VALUE;
|
||||
}
|
||||
|
||||
long currentTime = GlobalClock.getCurrentTime();
|
||||
long stepSize = core.getStepSize();
|
||||
|
||||
long timeTillAvailable = FUs[FUType.ordinal()][0].getTimeWhenFUAvailable();
|
||||
long timeTillAvailable = Long.MAX_VALUE;
|
||||
|
||||
for(int i = 0; i < FUs[FUType.ordinal()].length; i++)
|
||||
{
|
||||
|
|
@ -130,21 +353,9 @@ public class ExecutionCore {
|
|||
if(canUse == true)
|
||||
{
|
||||
FUs[FUType.ordinal()][i].setTimeWhenFUAvailable(currentTime
|
||||
+ FUs[FUType.ordinal()][i].getReciprocalOfThroughput()*stepSize);
|
||||
+ FUs[FUType.ordinal()][i].getReciprocalOfThroughput(functionality)*stepSize);
|
||||
|
||||
if(FUType == FunctionalUnitType.integerALU)
|
||||
{
|
||||
//TODO this is overcounting in case of pipelined FUs
|
||||
incrementIntALUAccesses(FUs[FUType.ordinal()][i].getLatency());
|
||||
}
|
||||
else if(FUType == FunctionalUnitType.floatALU)
|
||||
{
|
||||
incrementFloatALUAccesses(FUs[FUType.ordinal()][i].getLatency());
|
||||
}
|
||||
else
|
||||
{
|
||||
incrementComplexALUAccesses(FUs[FUType.ordinal()][i].getLatency());
|
||||
}
|
||||
FUs[FUType.ordinal()][i].incrementNoOfCyclesBusy(FUs[FUType.ordinal()][i].getLatency(functionality));
|
||||
|
||||
portUsedThisCycle[FUs[FUType.ordinal()][i].getPortNumber()] = true;
|
||||
|
||||
|
|
@ -159,9 +370,9 @@ public class ExecutionCore {
|
|||
return timeTillAvailable;
|
||||
}
|
||||
|
||||
public int getFULatency(FunctionalUnitType FUType)
|
||||
public int getFULatency(FunctionalUnitType FUType, int functionality)
|
||||
{
|
||||
return FUs[FUType.ordinal()][0].getLatency();
|
||||
return FUs[FUType.ordinal()][0].getLatency(functionality);
|
||||
}
|
||||
|
||||
public int getNumberOfUnits(FunctionalUnitType FUType)
|
||||
|
|
@ -174,34 +385,114 @@ public class ExecutionCore {
|
|||
return FUs[_FUType.ordinal()][_FUInstance].getTimeWhenFUAvailable();
|
||||
}
|
||||
|
||||
void incrementIntALUAccesses(int incrementBy)
|
||||
{
|
||||
numIntALUAccesses += incrementBy;
|
||||
}
|
||||
|
||||
void incrementFloatALUAccesses(int incrementBy)
|
||||
{
|
||||
numFloatALUAccesses += incrementBy;
|
||||
}
|
||||
|
||||
void incrementComplexALUAccesses(int incrementBy)
|
||||
{
|
||||
numComplexALUAccesses += incrementBy;
|
||||
}
|
||||
|
||||
public EnergyConfig calculateAndPrintEnergy(FileWriter outputFileWriter, String componentName) throws IOException
|
||||
{
|
||||
EnergyConfig totalPower = new EnergyConfig(0, 0);
|
||||
EnergyConfig intALUPower = new EnergyConfig(core.getIntALUPower(), numIntALUAccesses);
|
||||
totalPower.add(totalPower, intALUPower);
|
||||
EnergyConfig floatALUPower = new EnergyConfig(core.getFloatALUPower(), numFloatALUAccesses);
|
||||
totalPower.add(totalPower, floatALUPower);
|
||||
EnergyConfig complexALUPower = new EnergyConfig(core.getComplexALUPower(), numComplexALUAccesses);
|
||||
totalPower.add(totalPower, complexALUPower);
|
||||
|
||||
intALUPower.printEnergyStats(outputFileWriter, componentName + ".intALU");
|
||||
floatALUPower.printEnergyStats(outputFileWriter, componentName + ".floatALU");
|
||||
complexALUPower.printEnergyStats(outputFileWriter, componentName + ".complexALU");
|
||||
for(int i = 0; i < FUs.length; i++)
|
||||
{
|
||||
if(FUs[i] != null && FUs[i].length > 0)
|
||||
{
|
||||
FunctionalUnitType FUType = FUs[i][0].getFUType();
|
||||
for(int j = 0; j < FUs[i].length; j++)
|
||||
{
|
||||
EnergyConfig FUPower = new EnergyConfig(0, 0);
|
||||
|
||||
switch(FUType)
|
||||
{
|
||||
case integerALU : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().IntALUPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case integerMul : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().IntMulPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case integerDiv : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().IntDivPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case floatALU : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().FloatALUPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case floatMul : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().FloatMulPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case floatDiv : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().FloatDivPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case integerVectorALU : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().IntVectorALUPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case integerVectorMul : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().IntVectorMulPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case floatVectorALU : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().FloatVectorALUPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case floatVectorMul : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().FloatVectorMulPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case FMA : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().FMAPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case branch : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().BranchPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case load : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().LoadPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case loadAGU : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().LoadAGUPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case store : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().StorePower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case storeAGU : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().StoreAGUPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case AES : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().AESPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case vectorString : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().VectorStringPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case bitScan : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().BitScanPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case vectorShuffle : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().VectorShufflePower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
case LEA : {
|
||||
FUPower = new EnergyConfig(core.getCoreConfig().LEAPower, FUs[i][j].getNoOfCyclesBusy());
|
||||
break;
|
||||
}
|
||||
default : {
|
||||
misc.Error.showErrorAndExit("trying to compute power consumed of unknown FU Type " + FUType);
|
||||
}
|
||||
}
|
||||
|
||||
totalPower.add(FUPower);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return totalPower;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,17 +4,29 @@ package pipeline;
|
|||
public class FunctionalUnit {
|
||||
|
||||
FunctionalUnitType FUType;
|
||||
int latency;
|
||||
int reciprocalOfThroughput;
|
||||
int numFunctionalities;
|
||||
/*
|
||||
* FMA can do float ALU, float Mul, float vector ALU, float vector Mul, FMA, vector FMA
|
||||
*/
|
||||
int[] latency;
|
||||
int[] reciprocalOfThroughput;
|
||||
long timeWhenFUAvailable;
|
||||
int portNumber;
|
||||
|
||||
public FunctionalUnit(FunctionalUnitType FUType, int latency,
|
||||
int reciprocalOfThroughput, int portNumber)
|
||||
long noOfCyclesBusy;
|
||||
|
||||
public FunctionalUnit(FunctionalUnitType FUType, int numFunctionalities, int[] latency,
|
||||
int[] reciprocalOfThroughput, int portNumber)
|
||||
{
|
||||
this.FUType = FUType;
|
||||
this.latency = latency;
|
||||
this.reciprocalOfThroughput = reciprocalOfThroughput;
|
||||
this.numFunctionalities = numFunctionalities;
|
||||
this.latency = new int[numFunctionalities];
|
||||
this.reciprocalOfThroughput = new int[numFunctionalities];
|
||||
for(int i = 0; i < numFunctionalities; i++)
|
||||
{
|
||||
this.latency[i] = latency[i];
|
||||
this.reciprocalOfThroughput[i] = reciprocalOfThroughput[i];
|
||||
}
|
||||
this.timeWhenFUAvailable = 0;
|
||||
this.portNumber = portNumber;
|
||||
}
|
||||
|
|
@ -23,12 +35,12 @@ public class FunctionalUnit {
|
|||
return FUType;
|
||||
}
|
||||
|
||||
public int getLatency() {
|
||||
return latency;
|
||||
public int getLatency(int functionality) {
|
||||
return latency[functionality];
|
||||
}
|
||||
|
||||
public int getReciprocalOfThroughput() {
|
||||
return reciprocalOfThroughput;
|
||||
public int getReciprocalOfThroughput(int functionality) {
|
||||
return reciprocalOfThroughput[functionality];
|
||||
}
|
||||
|
||||
public long getTimeWhenFUAvailable() {
|
||||
|
|
@ -43,4 +55,12 @@ public class FunctionalUnit {
|
|||
return portNumber;
|
||||
}
|
||||
|
||||
public long getNoOfCyclesBusy() {
|
||||
return noOfCyclesBusy;
|
||||
}
|
||||
|
||||
public void incrementNoOfCyclesBusy(long noOfCyclesBusy) {
|
||||
this.noOfCyclesBusy += noOfCyclesBusy;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,12 +5,25 @@ public enum FunctionalUnitType {
|
|||
inValid,
|
||||
integerALU,
|
||||
integerMul,
|
||||
integerDiv,
|
||||
integerDiv/*approximated as a single instruction exercising a single FU, though data sheets speak of multiple micro-ops*/,
|
||||
floatALU,
|
||||
floatMul,
|
||||
floatDiv,
|
||||
memory,
|
||||
jump,
|
||||
FMA,
|
||||
integerVectorALU,
|
||||
integerVectorMul,
|
||||
floatVectorALU,
|
||||
floatVectorMul,
|
||||
load,
|
||||
loadAGU,
|
||||
store,
|
||||
storeAGU,
|
||||
branch,
|
||||
AES,
|
||||
vectorString,
|
||||
bitScan,
|
||||
vectorShuffle,
|
||||
LEA,
|
||||
no_of_types
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,48 +7,108 @@ import generic.OperationType;
|
|||
*/
|
||||
public class OpTypeToFUTypeMapping {
|
||||
|
||||
public static FunctionalUnitType getFUType(OperationType opType)
|
||||
public static FunctionalUnitType[] intALUFUs = {FunctionalUnitType.integerALU};
|
||||
public static FunctionalUnitType[] intMulFUs = {FunctionalUnitType.integerMul};
|
||||
public static FunctionalUnitType[] intDivFUs = {FunctionalUnitType.integerDiv};
|
||||
public static FunctionalUnitType[] floatALUFUs = {FunctionalUnitType.floatALU, FunctionalUnitType.FMA};
|
||||
public static FunctionalUnitType[] floatMulFUs = {FunctionalUnitType.floatMul, FunctionalUnitType.FMA};
|
||||
public static FunctionalUnitType[] floatDivFUs = {FunctionalUnitType.floatDiv};
|
||||
public static FunctionalUnitType[] intVectorALUFUs = {FunctionalUnitType.integerVectorALU};
|
||||
public static FunctionalUnitType[] intVectorMulFUs = {FunctionalUnitType.integerVectorMul};
|
||||
public static FunctionalUnitType[] floatVectorALUFUs = {FunctionalUnitType.floatVectorALU, FunctionalUnitType.FMA};
|
||||
public static FunctionalUnitType[] floatVectorMulFUs = {FunctionalUnitType.floatVectorMul, FunctionalUnitType.FMA};
|
||||
public static FunctionalUnitType[] FMAFUs = {FunctionalUnitType.FMA};
|
||||
public static FunctionalUnitType[] VectorFMAFUs = {FunctionalUnitType.FMA};
|
||||
public static FunctionalUnitType[] loadFUs = {FunctionalUnitType.load};
|
||||
public static FunctionalUnitType[] loadAGUFUs = {FunctionalUnitType.loadAGU};
|
||||
public static FunctionalUnitType[] storeFUs = {FunctionalUnitType.store};
|
||||
public static FunctionalUnitType[] storeAGUFUs = {FunctionalUnitType.storeAGU};
|
||||
public static FunctionalUnitType[] branchFUs = {FunctionalUnitType.branch};
|
||||
public static FunctionalUnitType[] AESFUs = {FunctionalUnitType.AES};
|
||||
public static FunctionalUnitType[] vectorStringFUs = {FunctionalUnitType.vectorString};
|
||||
public static FunctionalUnitType[] bitScanFUs = {FunctionalUnitType.bitScan};
|
||||
public static FunctionalUnitType[] vectorShuffleFUs = {FunctionalUnitType.vectorShuffle};
|
||||
public static FunctionalUnitType[] LEAFUs = {FunctionalUnitType.LEA};
|
||||
public static FunctionalUnitType[] invalidFUs = {FunctionalUnitType.inValid};
|
||||
|
||||
|
||||
public static FunctionalUnitType[] getFUType(OperationType opType)
|
||||
{
|
||||
switch(opType)
|
||||
{
|
||||
case integerALU : {
|
||||
return FunctionalUnitType.integerALU;
|
||||
return intALUFUs;
|
||||
}
|
||||
case integerMul : {
|
||||
return FunctionalUnitType.integerMul;
|
||||
return intMulFUs;
|
||||
}
|
||||
case integerDiv : {
|
||||
return FunctionalUnitType.integerDiv;
|
||||
return intDivFUs;
|
||||
}
|
||||
case floatALU : {
|
||||
return FunctionalUnitType.floatALU;
|
||||
return floatALUFUs;
|
||||
}
|
||||
case floatMul : {
|
||||
return FunctionalUnitType.floatMul;
|
||||
return floatMulFUs;
|
||||
}
|
||||
case floatDiv : {
|
||||
return FunctionalUnitType.floatDiv;
|
||||
return floatDivFUs;
|
||||
}
|
||||
case integerVectorALU : {
|
||||
return intVectorALUFUs;
|
||||
}
|
||||
case integerVectorMul : {
|
||||
return intVectorMulFUs;
|
||||
}
|
||||
case floatVectorALU : {
|
||||
return floatVectorALUFUs;
|
||||
}
|
||||
case floatVectorMul : {
|
||||
return floatVectorMulFUs;
|
||||
}
|
||||
case FMA : {
|
||||
return FMAFUs;
|
||||
}
|
||||
case vectorFMA : {
|
||||
return VectorFMAFUs;
|
||||
}
|
||||
case read_prefetch:
|
||||
case load : {
|
||||
return FunctionalUnitType.memory;
|
||||
return loadFUs;
|
||||
}
|
||||
case loadAGU : {
|
||||
return loadAGUFUs;
|
||||
}
|
||||
case write_prefetch:
|
||||
case store : {
|
||||
return FunctionalUnitType.memory;
|
||||
return storeFUs;
|
||||
}
|
||||
case storeAGU : {
|
||||
return storeAGUFUs;
|
||||
}
|
||||
case jump : {
|
||||
return FunctionalUnitType.jump;
|
||||
return branchFUs;
|
||||
}
|
||||
case branch : {
|
||||
return FunctionalUnitType.jump;
|
||||
return branchFUs;
|
||||
}
|
||||
case mov : {
|
||||
return FunctionalUnitType.integerALU;
|
||||
case AES : {
|
||||
return AESFUs;
|
||||
}
|
||||
case xchg : {
|
||||
return FunctionalUnitType.integerALU;
|
||||
case vectorString : {
|
||||
return vectorStringFUs;
|
||||
}
|
||||
case bitScan : {
|
||||
return bitScanFUs;
|
||||
}
|
||||
case vectorShuffle : {
|
||||
return vectorShuffleFUs;
|
||||
}
|
||||
case LEA : {
|
||||
return LEAFUs;
|
||||
}
|
||||
default : {
|
||||
return FunctionalUnitType.inValid;
|
||||
return invalidFUs;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@ package pipeline.multi_issue_inorder;
|
|||
|
||||
import java.io.FileWriter;
|
||||
import java.io.IOException;
|
||||
import java.util.HashMap;
|
||||
|
||||
import config.EnergyConfig;
|
||||
import config.SimulationConfig;
|
||||
|
|
@ -34,6 +35,8 @@ public class DecodeUnit_MII extends SimulationElement{
|
|||
|
||||
long instCtr; //for debug
|
||||
|
||||
public HashMap<Long, FunctionalUnitType> assignedFUType;
|
||||
|
||||
public DecodeUnit_MII(Core core, MultiIssueInorderExecutionEngine execEngine)
|
||||
{
|
||||
/*
|
||||
|
|
@ -52,6 +55,8 @@ public class DecodeUnit_MII extends SimulationElement{
|
|||
lastValidIPSeen = -1;
|
||||
|
||||
instCtr = 0;
|
||||
|
||||
assignedFUType = new HashMap<Long, FunctionalUnitType>();
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -83,11 +88,63 @@ public class DecodeUnit_MII extends SimulationElement{
|
|||
}
|
||||
|
||||
//check for structural hazards
|
||||
FunctionalUnitType[] FUType = OpTypeToFUTypeMapping.getFUType(ins.getOperationType());
|
||||
long FURequest = 0;
|
||||
if(OpTypeToFUTypeMapping.getFUType(ins.getOperationType()) != FunctionalUnitType.inValid)
|
||||
|
||||
//int functionality = 6;
|
||||
FunctionalUnitType assignedFUType = FunctionalUnitType.inValid;
|
||||
|
||||
if(FUType[0] != FunctionalUnitType.inValid)
|
||||
{
|
||||
FURequest = containingExecutionEngine.getExecutionCore().requestFU(
|
||||
OpTypeToFUTypeMapping.getFUType(ins.getOperationType()));
|
||||
for(int i = 0; i < FUType.length; i++)
|
||||
{
|
||||
/*
|
||||
if(FUType[i].compareTo(FunctionalUnitType.FMA) != 0)
|
||||
{
|
||||
functionality = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
switch(opType)
|
||||
{
|
||||
case floatALU: {
|
||||
functionality = 0;
|
||||
break;
|
||||
}
|
||||
case floatMul: {
|
||||
functionality = 1;
|
||||
break;
|
||||
}
|
||||
case floatVectorALU: {
|
||||
functionality = 2;
|
||||
break;
|
||||
}
|
||||
case floatVectorMul: {
|
||||
functionality = 3;
|
||||
break;
|
||||
}
|
||||
case FMA: {
|
||||
functionality = 4;
|
||||
break;
|
||||
}
|
||||
case vectorFMA: {
|
||||
functionality = 5;
|
||||
break;
|
||||
}
|
||||
default : {
|
||||
misc.Error.showErrorAndExit("requesting unsupported operation " + opType + " from an FMA");
|
||||
}
|
||||
}
|
||||
}
|
||||
*/
|
||||
|
||||
FURequest = containingExecutionEngine.getExecutionCore().requestFU(FUType[i], 0);
|
||||
if(FURequest <= 0)
|
||||
{
|
||||
assignedFUType = FUType[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if(FURequest > 0)
|
||||
{
|
||||
|
|
@ -96,27 +153,14 @@ public class DecodeUnit_MII extends SimulationElement{
|
|||
}
|
||||
|
||||
incrementNumDecodes(1);
|
||||
|
||||
|
||||
this.assignedFUType.put(ins.getSerialNo(), assignedFUType);
|
||||
|
||||
//add destination register of ins to list of outstanding registers
|
||||
if(ins.getOperationType() == OperationType.load)
|
||||
{
|
||||
addToValueReadyArray(ins.getDestinationOperand(), Long.MAX_VALUE);
|
||||
}
|
||||
else if(ins.getOperationType() == OperationType.xchg)
|
||||
{
|
||||
addToValueReadyArray(ins.getSourceOperand1(),
|
||||
GlobalClock.getCurrentTime()
|
||||
+ containingExecutionEngine.getExecutionCore().getFULatency(
|
||||
OpTypeToFUTypeMapping.getFUType(ins.getOperationType())));
|
||||
if(ins.getSourceOperand1().getValue() != ins.getSourceOperand2().getValue()
|
||||
|| ins.getSourceOperand1().getOperandType() != ins.getSourceOperand2().getOperandType())
|
||||
{
|
||||
addToValueReadyArray(ins.getSourceOperand2(),
|
||||
GlobalClock.getCurrentTime()
|
||||
+ containingExecutionEngine.getExecutionCore().getFULatency(
|
||||
OpTypeToFUTypeMapping.getFUType(ins.getOperationType())));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(ins.getDestinationOperand() != null)
|
||||
|
|
@ -124,7 +168,7 @@ public class DecodeUnit_MII extends SimulationElement{
|
|||
addToValueReadyArray(ins.getDestinationOperand(),
|
||||
GlobalClock.getCurrentTime()
|
||||
+ containingExecutionEngine.getExecutionCore().getFULatency(
|
||||
OpTypeToFUTypeMapping.getFUType(ins.getOperationType())));
|
||||
assignedFUType, 0));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -63,13 +63,16 @@ public class ExecUnitIn_MII extends SimulationElement{
|
|||
ins = idExLatch.peek(0);
|
||||
if(ins!=null)
|
||||
{
|
||||
FunctionalUnitType FUType = OpTypeToFUTypeMapping.getFUType(ins.getOperationType());
|
||||
FunctionalUnitType FUType = containingExecutionEngine.getDecodeUnitIn().assignedFUType.get(ins.getSerialNo());
|
||||
long lat = 1;
|
||||
|
||||
if(FUType != FunctionalUnitType.memory
|
||||
if(FUType != FunctionalUnitType.load
|
||||
&& FUType != FunctionalUnitType.loadAGU
|
||||
&& FUType != FunctionalUnitType.store
|
||||
&& FUType != FunctionalUnitType.storeAGU
|
||||
&& FUType != FunctionalUnitType.inValid)
|
||||
{
|
||||
lat = containingExecutionEngine.getExecutionCore().getFULatency(FUType);
|
||||
lat = containingExecutionEngine.getExecutionCore().getFULatency(FUType, 0);
|
||||
}
|
||||
/*
|
||||
* memory address computation for loads/stores happens in this cycle
|
||||
|
|
@ -86,8 +89,9 @@ public class ExecUnitIn_MII extends SimulationElement{
|
|||
exMemLatch.add(ins, idExLatch.getInstructionCompletesAt(ins) + lat);
|
||||
idExLatch.poll();
|
||||
|
||||
if(ins.getDestinationOperand() != null
|
||||
|| ins.getOperationType() == OperationType.xchg)
|
||||
containingExecutionEngine.getDecodeUnitIn().assignedFUType.remove(ins.getSerialNo());
|
||||
|
||||
if(ins.getDestinationOperand() != null)
|
||||
{
|
||||
incrementResultsBroadcastBusAccesses(1);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ public class FetchUnitIn_MII extends SimulationElement
|
|||
this.ifId_latch = execEngine.getIfIdLatch();
|
||||
|
||||
this.fetchBufferCapacity = (int)(core.getIssueWidth()
|
||||
* (SystemConfig.core[core.getCore_number()].getICacheLatency()/core.getStepSize()));
|
||||
* SystemConfig.core[core.getCore_number()].getICacheLatency());
|
||||
this.fetchBuffer = new Instruction[this.fetchBufferCapacity];
|
||||
this.fetchFillCount=0;
|
||||
this.fetchBufferIndex=0;
|
||||
|
|
@ -71,22 +71,17 @@ public class FetchUnitIn_MII extends SimulationElement
|
|||
|
||||
public void fillFetchBuffer(MultiIssueInorderPipeline inorderPipeline)
|
||||
{
|
||||
if(inputToPipeline.isEmpty())
|
||||
return;
|
||||
|
||||
Instruction newInstruction=null;
|
||||
for(int i=(this.fetchBufferIndex+this.fetchFillCount)%this.fetchBufferCapacity;this.fetchFillCount<this.fetchBufferCapacity
|
||||
;i = (i+1)%this.fetchBufferCapacity){
|
||||
|
||||
if(containingExecutionEngine.multiIssueInorderCoreMemorySystem.getiCache().isBusy(newInstruction.getCISCProgramCounter())){
|
||||
if(inputToPipeline.isEmpty()
|
||||
|| containingExecutionEngine.multiIssueInorderCoreMemorySystem.getiCache().isBusy(inputToPipeline.peek(0).getCISCProgramCounter())){
|
||||
break;
|
||||
}
|
||||
|
||||
newInstruction = inputToPipeline.pollFirst();
|
||||
|
||||
if(newInstruction == null)
|
||||
return;
|
||||
|
||||
if(newInstruction.getOperationType() == OperationType.load ||
|
||||
newInstruction.getOperationType() == OperationType.store)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -11,8 +11,10 @@ import memorysystem.CoreMemorySystem;
|
|||
public class InorderCoreMemorySystem_MII extends CoreMemorySystem {
|
||||
|
||||
MultiIssueInorderExecutionEngine containingExecEngine;
|
||||
public int numOfLoads=0;
|
||||
public long numOfStores;
|
||||
public long numOfLoads=0;
|
||||
public long numOfStores=0;
|
||||
public long NoOfSoftwareReadPrefetch = 0;
|
||||
public long NoOfSoftwareWritePrefetch = 0;
|
||||
public InorderCoreMemorySystem_MII(Core core)
|
||||
{
|
||||
super(core);
|
||||
|
|
@ -191,4 +193,14 @@ public class InorderCoreMemorySystem_MII extends CoreMemorySystem {
|
|||
|
||||
}
|
||||
|
||||
@Override
|
||||
public long getNumberOfSoftwareReadPrefetches() {
|
||||
return NoOfSoftwareReadPrefetch;
|
||||
}
|
||||
|
||||
@Override
|
||||
public long getNumberOfSoftwareWritePrefetches() {
|
||||
return NoOfSoftwareWritePrefetch;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,6 +2,8 @@ package pipeline.multi_issue_inorder;
|
|||
|
||||
import config.SimulationConfig;
|
||||
import memorysystem.AddressCarryingEvent;
|
||||
import memorysystem.Cache;
|
||||
import pipeline.outoforder.OutOrderCoreMemorySystem;
|
||||
import generic.Core;
|
||||
import generic.Event;
|
||||
import generic.EventQueue;
|
||||
|
|
@ -77,6 +79,46 @@ public class MemUnitIn_MII extends SimulationElement{
|
|||
break;
|
||||
}
|
||||
}
|
||||
if(ins.getOperationType() == OperationType.read_prefetch)
|
||||
{
|
||||
Cache cacheToPrefetchTo = containingExecutionEngine.getCoreMemorySystem().getL1Cache();
|
||||
for(int i = 2; i <= ins.getSourceOperand2().getValue(); i++)
|
||||
{
|
||||
cacheToPrefetchTo = cacheToPrefetchTo.nextLevel;
|
||||
}
|
||||
|
||||
long addr = ins.getSourceOperand1MemValue();
|
||||
|
||||
if(cacheToPrefetchTo.isBusy(addr))
|
||||
break;
|
||||
|
||||
AddressCarryingEvent addressEvent = new AddressCarryingEvent(core.getEventQueue(),
|
||||
0, containingExecutionEngine.getCoreMemorySystem(), cacheToPrefetchTo, RequestType.Cache_Read, addr);
|
||||
|
||||
cacheToPrefetchTo.getPort().put(addressEvent);
|
||||
|
||||
((InorderCoreMemorySystem_MII)containingExecutionEngine.getCoreMemorySystem()).NoOfSoftwareReadPrefetch++;
|
||||
}
|
||||
if(ins.getOperationType() == OperationType.write_prefetch)
|
||||
{
|
||||
Cache cacheToPrefetchTo = containingExecutionEngine.getCoreMemorySystem().getL1Cache();
|
||||
|
||||
long addr = ins.getSourceOperand1MemValue();
|
||||
|
||||
if(cacheToPrefetchTo.isBusy(addr))
|
||||
break;
|
||||
|
||||
AddressCarryingEvent addressEvent = new AddressCarryingEvent(core.getEventQueue(),
|
||||
0, containingExecutionEngine.getCoreMemorySystem(), cacheToPrefetchTo, RequestType.Cache_Write, addr);
|
||||
/*
|
||||
* setting as cache write is an approximation
|
||||
* this would dirty the cache line, and that should actually not happen
|
||||
*/
|
||||
|
||||
cacheToPrefetchTo.getPort().put(addressEvent);
|
||||
|
||||
((InorderCoreMemorySystem_MII)containingExecutionEngine.getCoreMemorySystem()).NoOfSoftwareWritePrefetch++;
|
||||
}
|
||||
|
||||
if(ins.getSerialNo() != instCtr && ins.getOperationType() != OperationType.inValid)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -82,7 +82,7 @@ public class MultiIssueInorderExecutionEngine extends ExecutionEngine{
|
|||
l2accesses=0;
|
||||
|
||||
valueReadyInteger = new long[core.getNIntegerArchitecturalRegisters()];
|
||||
valueReadyFloat = new long[core.getNFloatingPointArchitecturalRegisters()];
|
||||
valueReadyFloat = new long[core.getNVectorArchitecturalRegisters()];
|
||||
}
|
||||
|
||||
public int getNumPipelines() {
|
||||
|
|
@ -129,7 +129,7 @@ public class MultiIssueInorderExecutionEngine extends ExecutionEngine{
|
|||
|
||||
if (execComplete == true)
|
||||
{
|
||||
core.setCoreCyclesTaken(GlobalClock.getCurrentTime()/core.getStepSize());
|
||||
core.setCoreCyclesTaken(GlobalClock.getCurrentTime());
|
||||
}
|
||||
}
|
||||
public boolean getExecutionComplete(){
|
||||
|
|
|
|||
|
|
@ -94,16 +94,7 @@ public class WriteBackUnitIn_MII extends SimulationElement{
|
|||
|
||||
//write-back
|
||||
incrementNumRegFileAccesses(ins.getDestinationOperand(), 1);
|
||||
if(ins.getOperationType() == OperationType.xchg)
|
||||
{
|
||||
incrementNumRegFileAccesses(ins.getSourceOperand1(), 1);
|
||||
if(ins.getSourceOperand1().getValue() != ins.getSourceOperand2().getValue()
|
||||
|| ins.getSourceOperand1().getOperandType() != ins.getSourceOperand2().getOperandType())
|
||||
{
|
||||
incrementNumRegFileAccesses(ins.getSourceOperand2(), 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if(ins.getSerialNo() != instCtr && ins.getOperationType() != OperationType.inValid)
|
||||
{
|
||||
misc.Error.showErrorAndExit("wb out of order!!");
|
||||
|
|
@ -169,7 +160,7 @@ public class WriteBackUnitIn_MII extends SimulationElement{
|
|||
EnergyConfig totalPower = new EnergyConfig(0, 0);
|
||||
EnergyConfig intRegFilePower = new EnergyConfig(core.getIntRegFilePower(), numIntRegFileAccesses);
|
||||
totalPower.add(totalPower, intRegFilePower);
|
||||
EnergyConfig floatRegFilePower = new EnergyConfig(core.getFpRegFilePower(), numFloatRegFileAccesses);
|
||||
EnergyConfig floatRegFilePower = new EnergyConfig(core.getVectorRegFilePower(), numFloatRegFileAccesses);
|
||||
totalPower.add(totalPower, floatRegFilePower);
|
||||
|
||||
intRegFilePower.printEnergyStats(outputFileWriter, componentName + ".int");
|
||||
|
|
|
|||
|
|
@ -65,6 +65,12 @@ public class DecodeLogic extends SimulationElement {
|
|||
break;
|
||||
}
|
||||
|
||||
if(constrainedBySerialization(headInstruction) == true)
|
||||
{
|
||||
containingExecutionEngine.setToStall6(true);
|
||||
break;
|
||||
}
|
||||
|
||||
if(headInstruction.getOperationType() == OperationType.load ||
|
||||
headInstruction.getOperationType() == OperationType.store)
|
||||
{
|
||||
|
|
@ -95,9 +101,31 @@ public class DecodeLogic extends SimulationElement {
|
|||
|
||||
containingExecutionEngine.setToStall3(false);
|
||||
containingExecutionEngine.setToStall4(false);
|
||||
containingExecutionEngine.setToStall6(false);
|
||||
}
|
||||
}
|
||||
|
||||
private boolean constrainedBySerialization(Instruction headInstruction) {
|
||||
|
||||
if(containingExecutionEngine.getReorderBuffer().getNumCPUIDsInBuffer() > 0)
|
||||
return true;
|
||||
|
||||
if(containingExecutionEngine.getReorderBuffer().getNumMFencesInBuffer() > 0
|
||||
&& (headInstruction.getOperationType() == OperationType.load
|
||||
|| headInstruction.getOperationType() == OperationType.store))
|
||||
return true;
|
||||
|
||||
if(containingExecutionEngine.getReorderBuffer().getNumSFencesInBuffer() > 0
|
||||
&& (headInstruction.getOperationType() == OperationType.store))
|
||||
return true;
|
||||
|
||||
if(containingExecutionEngine.getReorderBuffer().getNumLFencesInBuffer() > 0
|
||||
&& (headInstruction.getOperationType() == OperationType.load))
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
ReorderBufferEntry makeROBEntries(Instruction newInstruction)
|
||||
{
|
||||
if(newInstruction != null)
|
||||
|
|
@ -122,6 +150,26 @@ public class DecodeLogic extends SimulationElement {
|
|||
newROBEntry);
|
||||
}
|
||||
|
||||
if(newInstruction.getOperationType() == OperationType.cpuid)
|
||||
{
|
||||
containingExecutionEngine.getReorderBuffer().incrementNumCPUIDsInBuffer();
|
||||
}
|
||||
|
||||
if(newInstruction.getOperationType() == OperationType.mfence)
|
||||
{
|
||||
containingExecutionEngine.getReorderBuffer().incrementNumMFencesInBuffer();
|
||||
}
|
||||
|
||||
if(newInstruction.getOperationType() == OperationType.sfence)
|
||||
{
|
||||
containingExecutionEngine.getReorderBuffer().incrementNumSFencesInBuffer();
|
||||
}
|
||||
|
||||
if(newInstruction.getOperationType() == OperationType.lfence)
|
||||
{
|
||||
containingExecutionEngine.getReorderBuffer().incrementNumLFencesInBuffer();
|
||||
}
|
||||
|
||||
return newROBEntry;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -89,8 +89,7 @@ public class ExecutionLogic extends SimulationElement {
|
|||
reorderBufferEntry.setExecuted(true);
|
||||
|
||||
//wake up dependent instructions
|
||||
if(reorderBufferEntry.getInstruction().getDestinationOperand() != null
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
if(reorderBufferEntry.getInstruction().getDestinationOperand() != null)
|
||||
{
|
||||
performBroadCast(reorderBufferEntry);
|
||||
incrementResultsBroadcastBusAccesses(1);
|
||||
|
|
@ -125,20 +124,6 @@ public class ExecutionLogic extends SimulationElement {
|
|||
reorderBufferEntry.getThreadID(),
|
||||
(reorderBufferEntry.pos + 1)%ROB.MaxROBSize);
|
||||
}
|
||||
else if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
{
|
||||
WakeUpLogic.wakeUpLogic(core,
|
||||
reorderBufferEntry.getInstruction().getSourceOperand1().getOperandType(),
|
||||
reorderBufferEntry.getOperand1PhyReg1(),
|
||||
reorderBufferEntry.getThreadID(),
|
||||
(reorderBufferEntry.pos + 1)%ROB.MaxROBSize);
|
||||
|
||||
WakeUpLogic.wakeUpLogic(core,
|
||||
reorderBufferEntry.getInstruction().getSourceOperand2().getOperandType(),
|
||||
reorderBufferEntry.getOperand2PhyReg1(),
|
||||
reorderBufferEntry.getThreadID(),
|
||||
(reorderBufferEntry.pos + 1)%ROB.MaxROBSize);
|
||||
}
|
||||
}
|
||||
|
||||
void incrementResultsBroadcastBusAccesses(int incrementBy)
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
package pipeline.outoforder;
|
||||
|
||||
import config.SimulationConfig;
|
||||
import emulatorinterface.translator.x86.registers.Registers;
|
||||
import main.ArchitecturalComponent;
|
||||
import main.CustomObjectPool;
|
||||
import memorysystem.AddressCarryingEvent;
|
||||
|
|
@ -76,7 +77,8 @@ public class FetchLogic extends SimulationElement {
|
|||
!execEngine.isToStall2() &&
|
||||
!execEngine.isToStall3() &&
|
||||
!execEngine.isToStall4() &&
|
||||
!execEngine.isToStall5())
|
||||
!execEngine.isToStall5() &&
|
||||
!execEngine.isToStall6())
|
||||
{
|
||||
//add instructions, for whom "fetch" from iCache has completed, to fetch buffer
|
||||
//decode stage reads from this buffer
|
||||
|
|
|
|||
|
|
@ -9,6 +9,8 @@ import generic.GlobalClock;
|
|||
import generic.Instruction;
|
||||
import generic.OperationType;
|
||||
import generic.RequestType;
|
||||
import memorysystem.AddressCarryingEvent;
|
||||
import memorysystem.Cache;
|
||||
|
||||
/**
|
||||
* represents an entry in the instruction window
|
||||
|
|
@ -104,8 +106,8 @@ public class IWEntry {
|
|||
|
||||
boolean issueOthers()
|
||||
{
|
||||
FunctionalUnitType FUType = OpTypeToFUTypeMapping.getFUType(opType);
|
||||
if(FUType == FunctionalUnitType.inValid)
|
||||
FunctionalUnitType[] FUType = OpTypeToFUTypeMapping.getFUType(opType);
|
||||
if(FUType[0] == FunctionalUnitType.inValid)
|
||||
{
|
||||
associatedROBEntry.setIssued(true);
|
||||
associatedROBEntry.setFUInstance(0);
|
||||
|
|
@ -119,8 +121,166 @@ public class IWEntry {
|
|||
long FURequest = 0; //will be <= 0 if an FU was obtained
|
||||
//will be > 0 otherwise, indicating how long before
|
||||
// an FU of the type will be available
|
||||
|
||||
FunctionalUnitType assignedFUType = FunctionalUnitType.no_of_types;
|
||||
|
||||
FURequest = execEngine.getExecutionCore().requestFU(FUType);
|
||||
for(int i = 0; i < FUType.length; i++)
|
||||
{
|
||||
FURequest = execEngine.getExecutionCore().requestFU(FUType[i], 0);
|
||||
if(FURequest <= 0)
|
||||
{
|
||||
assignedFUType = FUType[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if(FURequest <= 0)
|
||||
{
|
||||
if(opType != OperationType.load
|
||||
&& opType != OperationType.store
|
||||
&& opType != OperationType.read_prefetch
|
||||
&& opType != OperationType.write_prefetch)
|
||||
{
|
||||
associatedROBEntry.setIssued(true);
|
||||
associatedROBEntry.setFUInstance((int) ((-1) * FURequest));
|
||||
|
||||
//remove IW entry
|
||||
instructionWindow.removeFromWindow(this);
|
||||
|
||||
core.getEventQueue().addEvent(
|
||||
new BroadCastEvent(
|
||||
GlobalClock.getCurrentTime() + (execEngine.getExecutionCore().getFULatency(
|
||||
assignedFUType, 0) - 1) * core.getStepSize(),
|
||||
null,
|
||||
execEngine.getExecuter(),
|
||||
RequestType.BROADCAST,
|
||||
associatedROBEntry));
|
||||
|
||||
core.getEventQueue().addEvent(
|
||||
new ExecCompleteEvent(
|
||||
null,
|
||||
GlobalClock.getCurrentTime() + execEngine.getExecutionCore().getFULatency(
|
||||
assignedFUType, 0) * core.getStepSize(),
|
||||
null,
|
||||
execEngine.getExecuter(),
|
||||
RequestType.EXEC_COMPLETE,
|
||||
associatedROBEntry));
|
||||
}
|
||||
else if(opType == OperationType.read_prefetch)
|
||||
{
|
||||
Cache cacheToPrefetchTo = execEngine.getCoreMemorySystem().getL1Cache();
|
||||
for(int i = 2; i <= associatedROBEntry.getInstruction().getSourceOperand2().getValue(); i++)
|
||||
{
|
||||
cacheToPrefetchTo = cacheToPrefetchTo.nextLevel;
|
||||
}
|
||||
|
||||
long addr = associatedROBEntry.getInstruction().getSourceOperand1MemValue();
|
||||
|
||||
if(cacheToPrefetchTo.isBusy(addr))
|
||||
return false;
|
||||
|
||||
AddressCarryingEvent addressEvent = new AddressCarryingEvent(execEngine.getCore().getEventQueue(),
|
||||
0, execEngine.getCoreMemorySystem(), cacheToPrefetchTo, RequestType.Cache_Read, addr);
|
||||
|
||||
cacheToPrefetchTo.getPort().put(addressEvent);
|
||||
|
||||
associatedROBEntry.setIssued(true);
|
||||
associatedROBEntry.setExecuted(true);
|
||||
associatedROBEntry.setWriteBackDone1(true);
|
||||
associatedROBEntry.setWriteBackDone2(true);
|
||||
|
||||
associatedROBEntry.setFUInstance((int) ((-1) * FURequest));
|
||||
|
||||
//remove IW entry
|
||||
instructionWindow.removeFromWindow(this);
|
||||
|
||||
((OutOrderCoreMemorySystem)execEngine.getCoreMemorySystem()).getLsqueue().NoOfSoftwareReadPrefetch++;
|
||||
|
||||
return true;
|
||||
}
|
||||
else if(opType == OperationType.write_prefetch)
|
||||
{
|
||||
Cache cacheToPrefetchTo = execEngine.getCoreMemorySystem().getL1Cache();
|
||||
|
||||
long addr = associatedROBEntry.getInstruction().getSourceOperand1MemValue();
|
||||
|
||||
if(cacheToPrefetchTo.isBusy(addr))
|
||||
return false;
|
||||
|
||||
AddressCarryingEvent addressEvent = new AddressCarryingEvent(execEngine.getCore().getEventQueue(),
|
||||
0, execEngine.getCoreMemorySystem(), cacheToPrefetchTo, RequestType.Cache_Write, addr);
|
||||
/*
|
||||
* setting as cache write is an approximation
|
||||
* this would dirty the cache line, and that should actually not happen
|
||||
*/
|
||||
|
||||
cacheToPrefetchTo.getPort().put(addressEvent);
|
||||
|
||||
associatedROBEntry.setIssued(true);
|
||||
associatedROBEntry.setExecuted(true);
|
||||
associatedROBEntry.setWriteBackDone1(true);
|
||||
associatedROBEntry.setWriteBackDone2(true);
|
||||
|
||||
associatedROBEntry.setFUInstance((int) ((-1) * FURequest));
|
||||
|
||||
//remove IW entry
|
||||
instructionWindow.removeFromWindow(this);
|
||||
|
||||
((OutOrderCoreMemorySystem)execEngine.getCoreMemorySystem()).getLsqueue().NoOfSoftwareWritePrefetch++;
|
||||
|
||||
return true;
|
||||
}
|
||||
/*
|
||||
int functionality = 6;
|
||||
FunctionalUnitType assignedFUType = FunctionalUnitType.no_of_types;
|
||||
|
||||
for(int i = 0; i < FUType.length; i++)
|
||||
{
|
||||
if(FUType[i].compareTo(FunctionalUnitType.FMA) != 0)
|
||||
{
|
||||
functionality = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
switch(opType)
|
||||
{
|
||||
case floatALU: {
|
||||
functionality = 0;
|
||||
break;
|
||||
}
|
||||
case floatMul: {
|
||||
functionality = 1;
|
||||
break;
|
||||
}
|
||||
case floatVectorALU: {
|
||||
functionality = 2;
|
||||
break;
|
||||
}
|
||||
case floatVectorMul: {
|
||||
functionality = 3;
|
||||
break;
|
||||
}
|
||||
case FMA: {
|
||||
functionality = 4;
|
||||
break;
|
||||
}
|
||||
case vectorFMA: {
|
||||
functionality = 5;
|
||||
break;
|
||||
}
|
||||
default : {
|
||||
misc.Error.showErrorAndExit("requesting unsupported operation " + opType + " from an FMA");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
FURequest = execEngine.getExecutionCore().requestFU(FUType[i], functionality);
|
||||
if(FURequest <= 0)
|
||||
{
|
||||
assignedFUType = FUType[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if(FURequest <= 0)
|
||||
{
|
||||
|
|
@ -135,7 +295,7 @@ public class IWEntry {
|
|||
core.getEventQueue().addEvent(
|
||||
new BroadCastEvent(
|
||||
GlobalClock.getCurrentTime() + (execEngine.getExecutionCore().getFULatency(
|
||||
OpTypeToFUTypeMapping.getFUType(opType)) - 1) * core.getStepSize(),
|
||||
assignedFUType, functionality) - 1) * core.getStepSize(),
|
||||
null,
|
||||
execEngine.getExecuter(),
|
||||
RequestType.BROADCAST,
|
||||
|
|
@ -145,13 +305,13 @@ public class IWEntry {
|
|||
new ExecCompleteEvent(
|
||||
null,
|
||||
GlobalClock.getCurrentTime() + execEngine.getExecutionCore().getFULatency(
|
||||
OpTypeToFUTypeMapping.getFUType(opType)) * core.getStepSize(),
|
||||
assignedFUType, functionality) * core.getStepSize(),
|
||||
null,
|
||||
execEngine.getExecuter(),
|
||||
RequestType.EXEC_COMPLETE,
|
||||
associatedROBEntry));
|
||||
}
|
||||
|
||||
*/
|
||||
if(SimulationConfig.debugMode)
|
||||
{
|
||||
System.out.println("issue : " + GlobalClock.getCurrentTime()/core.getStepSize() + " : " + associatedROBEntry.getInstruction());
|
||||
|
|
|
|||
|
|
@ -45,7 +45,11 @@ public class IWPushLogic extends SimulationElement {
|
|||
if(headROBEntry != null)
|
||||
{
|
||||
if(headROBEntry.getInstruction().getOperationType() == OperationType.inValid ||
|
||||
headROBEntry.getInstruction().getOperationType() == OperationType.nop)
|
||||
headROBEntry.getInstruction().getOperationType() == OperationType.nop ||
|
||||
headROBEntry.getInstruction().getOperationType() == OperationType.cpuid ||
|
||||
headROBEntry.getInstruction().getOperationType() == OperationType.mfence ||
|
||||
headROBEntry.getInstruction().getOperationType() == OperationType.sfence ||
|
||||
headROBEntry.getInstruction().getOperationType() == OperationType.lfence)
|
||||
{
|
||||
//need not be added to instruction window
|
||||
headROBEntry.setIssued(true);
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ public class OperandAvailabilityChecker {
|
|||
}
|
||||
|
||||
if(tempOpndType == OperandType.integerRegister ||
|
||||
tempOpndType == OperandType.floatRegister)
|
||||
tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
RenameTable tempRN;
|
||||
if(tempOpndType == OperandType.integerRegister)
|
||||
|
|
@ -37,7 +37,7 @@ public class OperandAvailabilityChecker {
|
|||
}
|
||||
else
|
||||
{
|
||||
tempRN = execEngine.getFloatingPointRenameTable();
|
||||
tempRN = execEngine.getVectorRenameTable();
|
||||
}
|
||||
|
||||
if(tempRN.getAssociatedRegisterFile().getValueValid(phyReg1) == true
|
||||
|
|
|
|||
|
|
@ -232,4 +232,18 @@ public class OutOrderCoreMemorySystem extends CoreMemorySystem {
|
|||
getLsqueue().NoOfForwards = numValueForwardings;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@Override
|
||||
public long getNumberOfSoftwareReadPrefetches() {
|
||||
return getLsqueue().NoOfSoftwareReadPrefetch;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@Override
|
||||
public long getNumberOfSoftwareWritePrefetches() {
|
||||
return getLsqueue().NoOfSoftwareWritePrefetch;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,9 +35,9 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
|
|||
private ReorderBuffer reorderBuffer;
|
||||
private InstructionWindow instructionWindow;
|
||||
private RegisterFile integerRegisterFile;
|
||||
private RegisterFile floatingPointRegisterFile;
|
||||
private RegisterFile vectorRegisterFile;
|
||||
private RenameTable integerRenameTable;
|
||||
private RenameTable floatingPointRenameTable;
|
||||
private RenameTable vectorRenameTable;
|
||||
|
||||
//Core-specific memory system (a set of LSQ, TLB and L1 cache)
|
||||
private OutOrderCoreMemorySystem outOrderCoreMemorySystem;
|
||||
|
|
@ -61,6 +61,9 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
|
|||
private boolean toStall5; //if branch mis-predicted
|
||||
//fetcher stall
|
||||
|
||||
private boolean toStall6; //decode is stalled because of a preceding serialization instruction
|
||||
//fetcher stall
|
||||
|
||||
|
||||
public long prevCycles;
|
||||
|
||||
|
|
@ -75,8 +78,8 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
|
|||
instructionWindow = new InstructionWindow(core, this);
|
||||
integerRegisterFile = new RegisterFile(core, core.getIntegerRegisterFileSize());
|
||||
integerRenameTable = new RenameTable(this, core.getNIntegerArchitecturalRegisters(), core.getIntegerRegisterFileSize(), integerRegisterFile, core.getNo_of_input_pipes());
|
||||
floatingPointRegisterFile = new RegisterFile(core, core.getFloatingPointRegisterFileSize());
|
||||
floatingPointRenameTable = new RenameTable(this, core.getNFloatingPointArchitecturalRegisters(), core.getFloatingPointRegisterFileSize(), floatingPointRegisterFile, core.getNo_of_input_pipes());
|
||||
vectorRegisterFile = new RegisterFile(core, core.getVectorRegisterFileSize());
|
||||
vectorRenameTable = new RenameTable(this, core.getNVectorArchitecturalRegisters(), core.getVectorRegisterFileSize(), vectorRegisterFile, core.getNo_of_input_pipes());
|
||||
|
||||
fetchBuffer = new GenericCircularQueue(Instruction.class, core.getDecodeWidth());
|
||||
fetcher = new FetchLogic(core, this);
|
||||
|
|
@ -95,6 +98,7 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
|
|||
toStall3 = false;
|
||||
toStall4 = false;
|
||||
toStall5 = false;
|
||||
toStall6 = false;
|
||||
prevCycles=0;
|
||||
}
|
||||
|
||||
|
|
@ -110,12 +114,12 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
|
|||
return decoder;
|
||||
}
|
||||
|
||||
public RegisterFile getFloatingPointRegisterFile() {
|
||||
return floatingPointRegisterFile;
|
||||
public RegisterFile getVectorRegisterFile() {
|
||||
return vectorRegisterFile;
|
||||
}
|
||||
|
||||
public RenameTable getFloatingPointRenameTable() {
|
||||
return floatingPointRenameTable;
|
||||
public RenameTable getVectorRenameTable() {
|
||||
return vectorRenameTable;
|
||||
}
|
||||
|
||||
public RegisterFile getIntegerRegisterFile() {
|
||||
|
|
@ -178,6 +182,14 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
|
|||
this.toStall5 = toStall5;
|
||||
}
|
||||
|
||||
public boolean isToStall6() {
|
||||
return toStall6;
|
||||
}
|
||||
|
||||
public void setToStall6(boolean toStall6) {
|
||||
this.toStall6 = toStall6;
|
||||
}
|
||||
|
||||
public GenericCircularQueue<Instruction> getFetchBuffer() {
|
||||
return fetchBuffer;
|
||||
}
|
||||
|
|
@ -253,7 +265,7 @@ public class OutOrderExecutionEngine extends ExecutionEngine {
|
|||
EnergyConfig intRegFilePower = getIntegerRegisterFile().calculateAndPrintEnergy(outputFileWriter, componentName + ".intRegFile");
|
||||
totalPower.add(totalPower, intRegFilePower);
|
||||
|
||||
EnergyConfig floatRegFilePower = getFloatingPointRegisterFile().calculateAndPrintEnergy(outputFileWriter, componentName + ".floatRegFile");
|
||||
EnergyConfig floatRegFilePower = getVectorRegisterFile().calculateAndPrintEnergy(outputFileWriter, componentName + ".floatRegFile");
|
||||
totalPower.add(totalPower, floatRegFilePower);
|
||||
|
||||
EnergyConfig iwPower = getInstructionWindow().calculateAndPrintEnergy(outputFileWriter, componentName + ".InstrWindow");
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ public class RegisterFile extends SimulationElement{
|
|||
}
|
||||
else
|
||||
{
|
||||
totalPower = new EnergyConfig(core.getFpRegFilePower(), numAccesses);
|
||||
totalPower = new EnergyConfig(core.getVectorRegFilePower(), numAccesses);
|
||||
}
|
||||
|
||||
totalPower.printEnergyStats(outputFileWriter, componentName);
|
||||
|
|
|
|||
|
|
@ -106,16 +106,14 @@ public class RenameLogic extends SimulationElement {
|
|||
*/
|
||||
private void processOperand1(ReorderBufferEntry reorderBufferEntry)
|
||||
{
|
||||
if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
{
|
||||
//handled in processDestOperand()
|
||||
return;
|
||||
}
|
||||
|
||||
Operand tempOpnd = reorderBufferEntry.getInstruction().getSourceOperand1();
|
||||
if(tempOpnd == null ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.inValid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop)
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.cpuid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.mfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.sfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.lfence)
|
||||
{
|
||||
reorderBufferEntry.setOperand1PhyReg1(-1);
|
||||
reorderBufferEntry.setOperand1PhyReg2(-1);
|
||||
|
|
@ -130,10 +128,10 @@ public class RenameLogic extends SimulationElement {
|
|||
reorderBufferEntry.setOperand1PhyReg1(execEngine.getIntegerRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand1PhyReg2(-1);
|
||||
}
|
||||
else if(tempOpndType == OperandType.floatRegister)
|
||||
else if(tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
archReg = (int) tempOpnd.getValue();
|
||||
reorderBufferEntry.setOperand1PhyReg1(execEngine.getFloatingPointRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand1PhyReg1(execEngine.getVectorRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand1PhyReg2(-1);
|
||||
}
|
||||
else if(tempOpndType == OperandType.memory)
|
||||
|
|
@ -155,9 +153,9 @@ public class RenameLogic extends SimulationElement {
|
|||
{
|
||||
reorderBufferEntry.setOperand1PhyReg1(execEngine.getIntegerRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else if(tempOpndType == OperandType.floatRegister)
|
||||
else if(tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
reorderBufferEntry.setOperand1PhyReg1(execEngine.getFloatingPointRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand1PhyReg1(execEngine.getVectorRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -179,9 +177,9 @@ public class RenameLogic extends SimulationElement {
|
|||
{
|
||||
reorderBufferEntry.setOperand1PhyReg2(execEngine.getIntegerRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else if(tempOpndType == OperandType.floatRegister)
|
||||
else if(tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
reorderBufferEntry.setOperand1PhyReg2(execEngine.getFloatingPointRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand1PhyReg2(execEngine.getVectorRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -201,17 +199,15 @@ public class RenameLogic extends SimulationElement {
|
|||
*/
|
||||
private void processOperand2(ReorderBufferEntry reorderBufferEntry)
|
||||
{
|
||||
if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
{
|
||||
//handled in processDestOperand()
|
||||
return;
|
||||
}
|
||||
|
||||
Operand tempOpnd = reorderBufferEntry.getInstruction().getSourceOperand2();
|
||||
|
||||
if(tempOpnd == null ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.inValid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop)
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.cpuid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.mfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.sfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.lfence)
|
||||
{
|
||||
reorderBufferEntry.setOperand2PhyReg1(-1);
|
||||
reorderBufferEntry.setOperand2PhyReg2(-1);
|
||||
|
|
@ -226,10 +222,10 @@ public class RenameLogic extends SimulationElement {
|
|||
reorderBufferEntry.setOperand2PhyReg1(execEngine.getIntegerRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand2PhyReg2(-1);
|
||||
}
|
||||
else if(tempOpndType == OperandType.floatRegister)
|
||||
else if(tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
archReg = (int) tempOpnd.getValue();
|
||||
reorderBufferEntry.setOperand2PhyReg1(execEngine.getFloatingPointRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand2PhyReg1(execEngine.getVectorRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand2PhyReg2(-1);
|
||||
}
|
||||
else if(tempOpndType == OperandType.memory)
|
||||
|
|
@ -251,9 +247,9 @@ public class RenameLogic extends SimulationElement {
|
|||
{
|
||||
reorderBufferEntry.setOperand2PhyReg1(execEngine.getIntegerRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else if(tempOpndType == OperandType.floatRegister)
|
||||
else if(tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
reorderBufferEntry.setOperand2PhyReg1(execEngine.getFloatingPointRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand2PhyReg1(execEngine.getVectorRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -275,9 +271,9 @@ public class RenameLogic extends SimulationElement {
|
|||
{
|
||||
reorderBufferEntry.setOperand2PhyReg2(execEngine.getIntegerRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else if(tempOpndType == OperandType.floatRegister)
|
||||
else if(tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
reorderBufferEntry.setOperand2PhyReg2(execEngine.getFloatingPointRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
reorderBufferEntry.setOperand2PhyReg2(execEngine.getVectorRenameTable().getPhysicalRegister(threadID, archReg));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -299,7 +295,11 @@ public class RenameLogic extends SimulationElement {
|
|||
private boolean canDestOperandBeProcessed(ReorderBufferEntry reorderBufferEntry)
|
||||
{
|
||||
if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.inValid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop)
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.cpuid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.mfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.sfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.lfence)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
|
@ -307,43 +307,22 @@ public class RenameLogic extends SimulationElement {
|
|||
int numIntRegsRequired = 0;
|
||||
int numFloatRegsRequired = 0;
|
||||
|
||||
if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
|
||||
Operand tempOpnd = reorderBufferEntry.getInstruction().getDestinationOperand();
|
||||
if(tempOpnd != null)
|
||||
{
|
||||
if(reorderBufferEntry.getInstruction().getSourceOperand1().getOperandType() == OperandType.integerRegister)
|
||||
if(tempOpnd.getOperandType() == OperandType.integerRegister)
|
||||
{
|
||||
numIntRegsRequired++;
|
||||
}
|
||||
else if(reorderBufferEntry.getInstruction().getSourceOperand1().getOperandType() == OperandType.floatRegister)
|
||||
else if(tempOpnd.getOperandType() == OperandType.vectorRegister)
|
||||
{
|
||||
numFloatRegsRequired++;
|
||||
}
|
||||
if(reorderBufferEntry.getInstruction().getSourceOperand2().getOperandType() == OperandType.integerRegister)
|
||||
{
|
||||
numIntRegsRequired++;
|
||||
}
|
||||
else if(reorderBufferEntry.getInstruction().getSourceOperand2().getOperandType() == OperandType.floatRegister)
|
||||
{
|
||||
numFloatRegsRequired++;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Operand tempOpnd = reorderBufferEntry.getInstruction().getDestinationOperand();
|
||||
if(tempOpnd != null)
|
||||
{
|
||||
if(tempOpnd.getOperandType() == OperandType.integerRegister)
|
||||
{
|
||||
numIntRegsRequired++;
|
||||
}
|
||||
else if(tempOpnd.getOperandType() == OperandType.floatRegister)
|
||||
{
|
||||
numFloatRegsRequired++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(numIntRegsRequired <= execEngine.getIntegerRenameTable().getAvailableListSize()
|
||||
&& numFloatRegsRequired <= execEngine.getFloatingPointRenameTable().getAvailableListSize())
|
||||
&& numFloatRegsRequired <= execEngine.getVectorRenameTable().getAvailableListSize())
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
|
@ -361,46 +340,21 @@ public class RenameLogic extends SimulationElement {
|
|||
Operand tempOpnd;
|
||||
OperandType tempOpndType;
|
||||
|
||||
if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
{
|
||||
tempOpnd = reorderBufferEntry.getInstruction().getSourceOperand1();
|
||||
tempOpndType = tempOpnd.getOperandType();
|
||||
|
||||
boolean op1handled = handleIntFloat(reorderBufferEntry, 2);
|
||||
|
||||
if(op1handled == true)
|
||||
{
|
||||
tempOpnd = reorderBufferEntry.getInstruction().getSourceOperand2();
|
||||
tempOpndType = tempOpnd.getOperandType();
|
||||
|
||||
if(tempOpndType == reorderBufferEntry.getInstruction().getSourceOperand1().getOperandType() &&
|
||||
tempOpnd.getValue() == reorderBufferEntry.getInstruction().getSourceOperand1().getValue())
|
||||
{
|
||||
//of the form xchg rx, rx
|
||||
reorderBufferEntry.setOperand2PhyReg1(reorderBufferEntry.getOperand1PhyReg1());
|
||||
return true;
|
||||
}
|
||||
|
||||
return handleIntFloat(reorderBufferEntry, 3);
|
||||
}
|
||||
else
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
tempOpnd = reorderBufferEntry.getInstruction().getDestinationOperand();
|
||||
if(tempOpnd == null ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.inValid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop)
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.cpuid ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.mfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.sfence ||
|
||||
reorderBufferEntry.getInstruction().getOperationType() == OperationType.lfence)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
tempOpndType = tempOpnd.getOperandType();
|
||||
if(tempOpndType != OperandType.integerRegister &&
|
||||
tempOpndType != OperandType.floatRegister)
|
||||
tempOpndType != OperandType.vectorRegister)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
|
@ -444,7 +398,7 @@ public class RenameLogic extends SimulationElement {
|
|||
}
|
||||
else
|
||||
{
|
||||
tempRN = execEngine.getFloatingPointRenameTable();
|
||||
tempRN = execEngine.getVectorRenameTable();
|
||||
}
|
||||
|
||||
int r = tempRN.allocatePhysicalRegister(threadID, registerNumber);
|
||||
|
|
@ -486,18 +440,15 @@ public class RenameLogic extends SimulationElement {
|
|||
|
||||
void checkOperand1Availability()
|
||||
{
|
||||
if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
{
|
||||
//handled in processDestOperand()
|
||||
reorderBufferEntry.setOperand1Available(true);
|
||||
return;
|
||||
}
|
||||
|
||||
Operand tempOpnd = instruction.getSourceOperand1();
|
||||
|
||||
if(tempOpnd == null
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.inValid
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.cpuid
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.mfence
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.sfence
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.lfence
|
||||
|| tempOpnd.getOperandType() == OperandType.immediate)
|
||||
{
|
||||
reorderBufferEntry.setOperand1Available(true);
|
||||
|
|
@ -510,7 +461,7 @@ public class RenameLogic extends SimulationElement {
|
|||
|
||||
OperandType tempOpndType = tempOpnd.getOperandType();
|
||||
if(tempOpndType == OperandType.integerRegister ||
|
||||
tempOpndType == OperandType.floatRegister)
|
||||
tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
if(opndAvailable[0] == true)
|
||||
{
|
||||
|
|
@ -527,18 +478,15 @@ public class RenameLogic extends SimulationElement {
|
|||
|
||||
void checkOperand2Availability()
|
||||
{
|
||||
if(reorderBufferEntry.getInstruction().getOperationType() == OperationType.xchg)
|
||||
{
|
||||
//handled in processDestOperand()
|
||||
reorderBufferEntry.setOperand2Available(true);
|
||||
return;
|
||||
}
|
||||
|
||||
Operand tempOpnd = reorderBufferEntry.getInstruction().getSourceOperand2();
|
||||
|
||||
if(tempOpnd == null
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.inValid
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.nop
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.cpuid
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.mfence
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.sfence
|
||||
|| reorderBufferEntry.getInstruction().getOperationType() == OperationType.lfence
|
||||
|| tempOpnd.getOperandType() == OperandType.immediate)
|
||||
{
|
||||
reorderBufferEntry.setOperand2Available(true);
|
||||
|
|
@ -551,7 +499,7 @@ public class RenameLogic extends SimulationElement {
|
|||
|
||||
OperandType tempOpndType = tempOpnd.getOperandType();
|
||||
if(tempOpndType == OperandType.integerRegister ||
|
||||
tempOpndType == OperandType.floatRegister)
|
||||
tempOpndType == OperandType.vectorRegister)
|
||||
{
|
||||
if(opndAvailable[0] == true)
|
||||
{
|
||||
|
|
@ -574,7 +522,7 @@ public class RenameLogic extends SimulationElement {
|
|||
public EnergyConfig calculateAndPrintEnergy(FileWriter outputFileWriter, String componentName) throws IOException
|
||||
{
|
||||
EnergyConfig intRenamePower = execEngine.getIntegerRenameTable().calculateAndPrintEnergy(outputFileWriter, (componentName + ".Int"));
|
||||
EnergyConfig floatRenamePower = execEngine.getFloatingPointRenameTable().calculateAndPrintEnergy(outputFileWriter, (componentName + ".Float"));
|
||||
EnergyConfig floatRenamePower = execEngine.getVectorRenameTable().calculateAndPrintEnergy(outputFileWriter, (componentName + ".Float"));
|
||||
|
||||
EnergyConfig totalPower = new EnergyConfig(0, 0);
|
||||
totalPower.add(totalPower, intRenamePower);
|
||||
|
|
|
|||
|
|
@ -110,6 +110,10 @@ public class RenameTable extends SimulationElement{
|
|||
}
|
||||
|
||||
int newPhyReg = removeFromAvailableList();
|
||||
if(archReg > 63)
|
||||
{
|
||||
System.out.println();
|
||||
}
|
||||
int oldPhyReg = this.archToPhyMapping[threadID][archReg];
|
||||
this.archReg[newPhyReg] = archReg;
|
||||
this.threadID[newPhyReg] = threadID;
|
||||
|
|
@ -266,7 +270,7 @@ public class RenameTable extends SimulationElement{
|
|||
else
|
||||
{
|
||||
RATpower = new EnergyConfig(execEngine.getContainingCore().getFpRATPower(), numRATAccesses);
|
||||
freeListPower = new EnergyConfig(execEngine.getContainingCore().getFpFreeListPower(), numFreeListAccesses);
|
||||
freeListPower = new EnergyConfig(execEngine.getContainingCore().getVectorFreeListPower(), numFreeListAccesses);
|
||||
}
|
||||
|
||||
EnergyConfig totalPower = new EnergyConfig(0, 0);
|
||||
|
|
|
|||
|
|
@ -36,11 +36,17 @@ public class ReorderBuffer extends SimulationElement{
|
|||
int head;
|
||||
int tail;
|
||||
|
||||
int numCPUIDsInBuffer;
|
||||
int numMFencesInBuffer;
|
||||
int numSFencesInBuffer;
|
||||
int numLFencesInBuffer;
|
||||
|
||||
int stall1Count;
|
||||
int stall2Count;
|
||||
int stall3Count;
|
||||
int stall4Count;
|
||||
int stall5Count;
|
||||
int stall6Count;
|
||||
long branchCount;
|
||||
long mispredCount;
|
||||
long jumpCount;
|
||||
|
|
@ -68,11 +74,17 @@ public class ReorderBuffer extends SimulationElement{
|
|||
ROB[i] = new ReorderBufferEntry(i, execEngine);
|
||||
}
|
||||
|
||||
numCPUIDsInBuffer = 0;
|
||||
numMFencesInBuffer = 0;
|
||||
numSFencesInBuffer = 0;
|
||||
numLFencesInBuffer = 0;
|
||||
|
||||
stall1Count = 0;
|
||||
stall2Count = 0;
|
||||
stall3Count = 0;
|
||||
stall4Count = 0;
|
||||
stall5Count = 0;
|
||||
stall6Count = 0;
|
||||
mispredCount = 0;
|
||||
branchCount = 0;
|
||||
lastValidIPSeen = -1;
|
||||
|
|
@ -167,6 +179,10 @@ public class ReorderBuffer extends SimulationElement{
|
|||
{
|
||||
stall5Count++;
|
||||
}
|
||||
if(execEngine.isToStall6())
|
||||
{
|
||||
stall6Count++;
|
||||
}
|
||||
|
||||
if(execEngine.isToStall5() == true /*pipeline stalled due to branch mis-prediction*/)
|
||||
{
|
||||
|
|
@ -283,6 +299,26 @@ public class ReorderBuffer extends SimulationElement{
|
|||
execEngine.getCoreMemorySystem().issueLSQCommit(first);
|
||||
}
|
||||
|
||||
if(firstInstruction.getOperationType() == OperationType.cpuid)
|
||||
{
|
||||
decrementNumCPUIDsInBuffer();
|
||||
}
|
||||
|
||||
if(firstInstruction.getOperationType() == OperationType.mfence)
|
||||
{
|
||||
decrementNumMFencesInBuffer();
|
||||
}
|
||||
|
||||
if(firstInstruction.getOperationType() == OperationType.sfence)
|
||||
{
|
||||
decrementNumSFencesInBuffer();
|
||||
}
|
||||
|
||||
if(firstInstruction.getOperationType() == OperationType.lfence)
|
||||
{
|
||||
decrementNumLFencesInBuffer();
|
||||
}
|
||||
|
||||
if(EmulatorConfig.storeExecutionTraceInAFile == true)
|
||||
{
|
||||
writeInstructionToFile(firstInstruction);
|
||||
|
|
@ -539,6 +575,54 @@ public class ReorderBuffer extends SimulationElement{
|
|||
}
|
||||
}
|
||||
|
||||
public int getNumCPUIDsInBuffer() {
|
||||
return numCPUIDsInBuffer;
|
||||
}
|
||||
|
||||
public void incrementNumCPUIDsInBuffer() {
|
||||
this.numCPUIDsInBuffer++;
|
||||
}
|
||||
|
||||
public void decrementNumCPUIDsInBuffer() {
|
||||
this.numCPUIDsInBuffer--;
|
||||
}
|
||||
|
||||
public int getNumMFencesInBuffer() {
|
||||
return numMFencesInBuffer;
|
||||
}
|
||||
|
||||
public void incrementNumMFencesInBuffer() {
|
||||
this.numMFencesInBuffer++;
|
||||
}
|
||||
|
||||
public void decrementNumMFencesInBuffer() {
|
||||
this.numMFencesInBuffer--;
|
||||
}
|
||||
|
||||
public int getNumSFencesInBuffer() {
|
||||
return numSFencesInBuffer;
|
||||
}
|
||||
|
||||
public void incrementNumSFencesInBuffer() {
|
||||
this.numSFencesInBuffer++;
|
||||
}
|
||||
|
||||
public void decrementNumSFencesInBuffer() {
|
||||
this.numSFencesInBuffer--;
|
||||
}
|
||||
|
||||
public int getNumLFencesInBuffer() {
|
||||
return numLFencesInBuffer;
|
||||
}
|
||||
|
||||
public void incrementNumLFencesInBuffer() {
|
||||
this.numLFencesInBuffer++;
|
||||
}
|
||||
|
||||
public void decrementNumLFencesInBuffer() {
|
||||
this.numLFencesInBuffer--;
|
||||
}
|
||||
|
||||
public int getMaxROBSize()
|
||||
{
|
||||
return MaxROBSize;
|
||||
|
|
|
|||
|
|
@ -148,17 +148,7 @@ public class WakeUpLogic {
|
|||
|
||||
if(ROBEntry.getPhysicalDestinationRegister() == physicalRegister &&
|
||||
ROBEntry.getInstruction().getDestinationOperand() != null &&
|
||||
ROBEntry.getInstruction().getDestinationOperand().getOperandType() == opndType
|
||||
||
|
||||
ROBEntry.getInstruction().getOperationType() == OperationType.xchg &&
|
||||
ROBEntry.getInstruction().getSourceOperand1() != null &&
|
||||
ROBEntry.getInstruction().getSourceOperand1().getOperandType() == opndType &&
|
||||
ROBEntry.getOperand1PhyReg1() == physicalRegister
|
||||
||
|
||||
ROBEntry.getInstruction().getOperationType() == OperationType.xchg &&
|
||||
ROBEntry.getInstruction().getSourceOperand2() != null &&
|
||||
ROBEntry.getInstruction().getSourceOperand2().getOperandType() == opndType &&
|
||||
ROBEntry.getOperand2PhyReg1() == physicalRegister)
|
||||
ROBEntry.getInstruction().getDestinationOperand().getOperandType() == opndType)
|
||||
{
|
||||
//this particular instruction also writes to the same register as the one that initiated
|
||||
//the wake-up. all subsequent consumers of this register should not be woken up.
|
||||
|
|
@ -183,9 +173,9 @@ public class WakeUpLogic {
|
|||
{
|
||||
execEngine.getIntegerRenameTable().setValueValid(true, physicalRegister);
|
||||
}
|
||||
else if(opndType == OperandType.floatRegister)
|
||||
else if(opndType == OperandType.vectorRegister)
|
||||
{
|
||||
execEngine.getFloatingPointRenameTable().setValueValid(true, physicalRegister);
|
||||
execEngine.getVectorRenameTable().setValueValid(true, physicalRegister);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -75,18 +75,6 @@ public class WriteBackLogic extends SimulationElement {
|
|||
writeToRFAndAddToAvailableList(buffer[i].getInstruction().getDestinationOperand(),
|
||||
buffer[i].getPhysicalDestinationRegister());
|
||||
}
|
||||
else if(buffer[i].getInstruction().getOperationType() == OperationType.xchg)
|
||||
{
|
||||
writeToRFAndAddToAvailableList(buffer[i].getInstruction().getSourceOperand1(),
|
||||
buffer[i].getOperand1PhyReg1());
|
||||
|
||||
if(buffer[i].getInstruction().getSourceOperand1().getOperandType() != buffer[i].getInstruction().getSourceOperand2().getOperandType() ||
|
||||
buffer[i].getOperand1PhyReg1() != buffer[i].getOperand2PhyReg1())
|
||||
{
|
||||
writeToRFAndAddToAvailableList(buffer[i].getInstruction().getSourceOperand2(),
|
||||
buffer[i].getOperand2PhyReg1());
|
||||
}
|
||||
}
|
||||
|
||||
if(SimulationConfig.debugMode)
|
||||
{
|
||||
|
|
@ -119,13 +107,13 @@ public class WriteBackLogic extends SimulationElement {
|
|||
}
|
||||
else if(destOpnd.isFloatRegisterOperand())
|
||||
{
|
||||
tempRN = execEngine.getFloatingPointRenameTable();
|
||||
tempRN = execEngine.getVectorRenameTable();
|
||||
if(tempRN.getMappingValid(physicalRegister) == false)
|
||||
{
|
||||
tempRN.addToAvailableList(physicalRegister);
|
||||
}
|
||||
tempRN.setValueValid(true, physicalRegister);
|
||||
execEngine.getFloatingPointRegisterFile().setValueValid(true, physicalRegister);
|
||||
execEngine.getVectorRegisterFile().setValueValid(true, physicalRegister);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue