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added instruction serial number in outoforder pipeline

This commit is contained in:
Rajshekar K K 2021-11-05 20:30:22 +05:30
parent 178dfd7a63
commit 5a4be62352
2 changed files with 6 additions and 0 deletions
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1
src/simulator/generic/Instruction.java
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@ -530,6 +530,7 @@ public class Instruction implements Serializable
{ {
return return
( (
String.format("%-20s", "s.no = " + serialNo) +
String.format("%-20s", "IP = " + Long.toHexString(ciscProgramCounter)) + String.format("%-20s", "IP = " + Long.toHexString(ciscProgramCounter)) +
String.format("%-20s", "Op = " + type) + String.format("%-20s", "Op = " + type) +
String.format("%-60s", "srcOp1 = " + sourceOperand1) + String.format("%-60s", "srcOp1 = " + sourceOperand1) +

5
src/simulator/pipeline/outoforder/FetchLogic.java
View File

@ -29,6 +29,8 @@ public class FetchLogic extends SimulationElement {
int fetchWidth; int fetchWidth;
OperationType[] instructionsToBeDropped; OperationType[] instructionsToBeDropped;
boolean sleep; boolean sleep;
long serialNo;
public FetchLogic(Core core, OutOrderExecutionEngine execEngine) public FetchLogic(Core core, OutOrderExecutionEngine execEngine)
{ {
@ -44,6 +46,8 @@ public class FetchLogic extends SimulationElement {
OperationType.interrupt, OperationType.interrupt,
OperationType.sync OperationType.sync
}; };
serialNo = 0;
} }
public void performFetch() public void performFetch()
@ -182,6 +186,7 @@ public class FetchLogic extends SimulationElement {
if(!iCacheBuffer.isFull() && execEngine.getCoreMemorySystem().getiCache().isBusy(newInstruction.getCISCProgramCounter())==false) if(!iCacheBuffer.isFull() && execEngine.getCoreMemorySystem().getiCache().isBusy(newInstruction.getCISCProgramCounter())==false)
{ {
iCacheBuffer.addToBuffer(inputToPipeline[inputPipeToReadNext].pollFirst()); iCacheBuffer.addToBuffer(inputToPipeline[inputPipeToReadNext].pollFirst());
newInstruction.setSerialNo(serialNo++);
if(SimulationConfig.detachMemSysInsn == false && newInstruction.getOperationType() != OperationType.inValid) if(SimulationConfig.detachMemSysInsn == false && newInstruction.getOperationType() != OperationType.inValid)
{ {
// The first micro-operation of an instruction has a valid CISC IP. All the subsequent // The first micro-operation of an instruction has a valid CISC IP. All the subsequent