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Group21_Lab5
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Add GPIO PortF initialiazation

This commit is contained in:
Sanyog Nevase Nevase 2024-09-20 20:18:04 +05:30
parent dcc551e1c6
commit 372b807bd1
1 changed files with 17 additions and 1 deletions
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18
main.c
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@ -6,4 +6,20 @@
#define STRELOAD *((volatile uint32_t *) 0xE000E014) // RELOAD VALUE #define STRELOAD *((volatile uint32_t *) 0xE000E014) // RELOAD VALUE
#define STCURRENT *((volatile uint32_t *) 0xE000E018) // CURRENT VALUE #define STCURRENT *((volatile uint32_t *) 0xE000E018) // CURRENT VALUE
#define CLOCK_HZ 16000000 // CLOCK FREQUENCY OF EK-TM4C123GXL #define CLOCK_HZ 16000000 // CLOCK FREQUENCY OF EK-TM4C123GXL
#define SYSTICK_RELOAD_VALUE(us) ((CLOCK_HZ / 1000000) * (us) - 1) // SYSTICK RELOAD VALUE #define SYSTICK_RELOAD_VALUE(us) ((CLOCK_HZ / 1000000) * (us) - 1) // SYSTICK RELOAD VALUE
void GPIO_PORT_F_init(void)
{
SYSCTL_RCGC2_R |= 0x00000020; // ENABLE CLOCK TO GPIOF
GPIO_PORTF_LOCK_R = 0x4C4F434B; // UNLOCK COMMIT REGISTER
GPIO_PORTF_CR_R = 0x1F; // MAKE PORTF0 CONFIGURABLE
GPIO_PORTF_DEN_R = 0x1F; // SET PORTF DIGITAL ENABLE
GPIO_PORTF_DIR_R = 0x0E; // SET PF0, PF4 as input and PF1, PF2 and PF3 as output
GPIO_PORTF_PUR_R = 0x11; // PORTF PF0 and PF4 IS PULLED UP
NVIC_EN0_R |= 1 << 30;
GPIO_PORTF_IS_R = 0x00; // Make it edge-sensitive
GPIO_PORTF_IBE_R = 0x00; // Trigger on one edge
GPIO_PORTF_IEV_R = 0x00; // Falling edge event
GPIO_PORTF_IM_R |= 0x11; // Unmask interrupts for PF0 and PF4
}