EE24MT028
/
Group21_Project
0
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Update UART Frame

This commit is contained in:
Uttam Bhavimani Bhavimani 2024-11-29 14:49:18 +05:30
parent 7ff54a38e0
commit 3e0c47f9f1
1 changed files with 1 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
main.c
View File

@ -16,7 +16,6 @@ void GPIO_PORT_F_init(void)
void GPIO_PORT_B_init(void) void GPIO_PORT_B_init(void)
{ {
SYSCTL_RCGCGPIO_R |= 0x02; // ENABLE CLOCK FOR GPIOB SYSCTL_RCGCGPIO_R |= 0x02; // ENABLE CLOCK FOR GPIOB
SYSCTL_RCGCUART_R |= 0x02; // ENABLE CLOCK FOR UART1 SYSCTL_RCGCUART_R |= 0x02; // ENABLE CLOCK FOR UART1
@ -28,7 +27,7 @@ void GPIO_PORT_B_init(void)
UART1_CTL_R &= ~0x01; // DISABLE UART1 DURING SETUP UART1_CTL_R &= ~0x01; // DISABLE UART1 DURING SETUP
UART1_IBRD_R = 104; // Set integer part of baud rate (for 9600 baud at 16 MHz clock) UART1_IBRD_R = 104; // Set integer part of baud rate (for 9600 baud at 16 MHz clock)
UART1_FBRD_R = 11; // Set fractional part of baud rate UART1_FBRD_R = 11; // Set fractional part of baud rate
UART1_LCRH_R = 0x62; // 8-bit, odd parity, 1 stop bit UART1_LCRH_R = 0x60; // 8-bit, No parity, 1 stop bit
UART1_CC_R = 0x00; // Use system clock UART1_CC_R = 0x00; // Use system clock
UART1_CTL_R |= 0x301; // Enable UART1, RX, and TX UART1_CTL_R |= 0x301; // Enable UART1, RX, and TX