UPDATE COMMENTS

This commit is contained in:
Sanyog Nevase Nevase 2024-10-10 22:26:18 +05:30
parent 8c4a905bf9
commit 1164bce4dc
1 changed files with 19 additions and 21 deletions

40
main.c
View File

@ -12,24 +12,24 @@ void GPIO_PORT_F_init(void)
GPIO_PORTF_PUR_R = 0x11; // PORTF PF0 and PF4 IS PULLED UP GPIO_PORTF_PUR_R = 0x11; // PORTF PF0 and PF4 IS PULLED UP
NVIC_EN0_R |= 1 << 30; NVIC_EN0_R |= 1 << 30;
GPIO_PORTF_IS_R = 0x00; // Make it edge-sensitive GPIO_PORTF_IS_R = 0x00; // EDGE SENSITIVE
GPIO_PORTF_IBE_R = 0x00; // Trigger on one edge GPIO_PORTF_IBE_R = 0x00; // ONE EDGE
GPIO_PORTF_IEV_R = 0x00; // Falling edge event GPIO_PORTF_IEV_R = 0x00; // INTERRUPT EVENT FALLING
GPIO_PORTF_IM_R |= 0x11; // Unmask interrupts for PF0 and PF4 GPIO_PORTF_IM_R |= 0x11; // UNMASK INTERRUPT
} }
void GPIO_PORT_B_init(void) void GPIO_PORT_B_init(void)
{ {
SYSCTL_RCGCGPIO_R |= 0x02; // Enable clock to GPIOB SYSCTL_RCGCGPIO_R |= 0x02; // ENABLE CLOCK FOR GPIOB
SYSCTL_RCGCUART_R |= 0x02; // Enable UART1 clock SYSCTL_RCGCUART_R |= 0x02; // ENABLE CLOCK FOR UART1
GPIO_PORTB_DEN_R |= 0x03; // Enable PB0, PB1 as digital GPIO_PORTB_DEN_R |= 0x03; // DIGITAL ENABLE FOR PB0 AND PB1
GPIO_PORTB_AFSEL_R |= 0x03; // Enable alternate function on PB0, PB1 GPIO_PORTB_AFSEL_R |= 0x03; // ENABLE ALTERNATE FUNCTION ON PB0,PB1
GPIO_PORTB_PCTL_R = (GPIO_PORTB_PCTL_R & 0xFFFFFF00) | 0x00000011; // Set PB0, PB1 for UART GPIO_PORTB_PCTL_R = (GPIO_PORTB_PCTL_R & 0xFFFFFF00) | 0x00000011; // Set PB0, PB1 for UART
UART1_CTL_R &= ~0x01; // Disable UART1 during setup UART1_CTL_R &= ~0x01; // DISABLE UART1 DURING SETUP
UART1_IBRD_R = 104; // Set integer part of baud rate (for 9600 baud at 16 MHz clock) UART1_IBRD_R = 104; // Set integer part of baud rate (for 9600 baud at 16 MHz clock)
UART1_FBRD_R = 11; // Set fractional part of baud rate UART1_FBRD_R = 11; // Set fractional part of baud rate
UART1_LCRH_R = 0x62; // 8-bit, odd parity, 1 stop bit UART1_LCRH_R = 0x62; // 8-bit, odd parity, 1 stop bit
@ -80,17 +80,17 @@ void STATUS_LED(char received_data)
{ {
if (received_data == 0xAA) if (received_data == 0xAA)
{ {
GPIO_PORTF_DATA_R |= 0x08; // Turn on Green LED (PF3) GPIO_PORTF_DATA_R |= 0x08; // Turn ON Green LED (PF3)
GPIO_PORTF_DATA_R &= ~0x04; // Turn off Blue LED (PF2) GPIO_PORTF_DATA_R &= ~0x04; // Turn OFF Blue LED (PF2)
} }
else if (received_data == 0xF0) else if (received_data == 0xF0)
{ {
GPIO_PORTF_DATA_R |= 0x04; // Turn on Blue LED (PF2) GPIO_PORTF_DATA_R |= 0x04; // Turn ON Blue LED (PF2)
GPIO_PORTF_DATA_R &= ~0x08; // Turn off Green LED (PF3) GPIO_PORTF_DATA_R &= ~0x08; // Turn OFF Green LED (PF3)
} }
else else
{ {
GPIO_PORTF_DATA_R |= 0x02; GPIO_PORTF_DATA_R |= 0x02; // RED LED FOR JUNK DATA
} }
} }
@ -98,17 +98,15 @@ void STATUS_LED(char received_data)
void GPIOF_interruptHandler(void) // Interrupt handler for GPIO Port F void GPIOF_interruptHandler(void) // Interrupt handler for GPIO Port F
{ {
if (GPIO_PORTF_RIS_R & 0x10) // Check if PF4 caused the interrupt if (GPIO_PORTF_RIS_R & 0x10) // SWITCH1 PRESS
{ {
UART1_WRITE(0xF0); UART1_WRITE(0xF0); // WRITE DATA ON UART1
STATUS_LED(UART1_READ());
GPIO_PORTF_ICR_R = 0x10; // Clear interrupt flag for PF4 GPIO_PORTF_ICR_R = 0x10; // Clear interrupt flag for PF4
} }
if (GPIO_PORTF_RIS_R & 0x01) // Check if PF0 caused the interrupt if (GPIO_PORTF_RIS_R & 0x01) // SWITCH2 PRESS
{ {
UART1_WRITE(0xAA); UART1_WRITE(0xAA); // WRITE DATA ON UART1
STATUS_LED(UART1_READ());
GPIO_PORTF_ICR_R = 0x01; // Clear interrupt flag for PF0 GPIO_PORTF_ICR_R = 0x01; // Clear interrupt flag for PF0
} }
} }
@ -121,7 +119,7 @@ int main(void) // MAIN FUNCTION
systick_setting(); // SYSTICK SETUP systick_setting(); // SYSTICK SETUP
while (1) while (1)
{ {
STATUS_LED(UART1_READ()); STATUS_LED(UART1_READ()); // STATUS LED
} }
} }