Update vector table
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			@ -1,300 +1,302 @@
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//*****************************************************************************
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		||||
//
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		||||
// Startup code for use with TI's Code Composer Studio.
 | 
			
		||||
//
 | 
			
		||||
// Copyright (c) 2011-2014 Texas Instruments Incorporated.  All rights reserved.
 | 
			
		||||
// Software License Agreement
 | 
			
		||||
// 
 | 
			
		||||
// Software License Agreement
 | 
			
		||||
//
 | 
			
		||||
// Texas Instruments (TI) is supplying this software for use solely and
 | 
			
		||||
// exclusively on TI's microcontroller products. The software is owned by
 | 
			
		||||
// TI and/or its suppliers, and is protected under applicable copyright
 | 
			
		||||
// laws. You may not combine this software with "viral" open-source
 | 
			
		||||
// software in order to form a larger program.
 | 
			
		||||
//
 | 
			
		||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
 | 
			
		||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
 | 
			
		||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 | 
			
		||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
 | 
			
		||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
 | 
			
		||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
 | 
			
		||||
//
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		||||
//*****************************************************************************
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		||||
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#include <stdint.h>
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//*****************************************************************************
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//
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// Forward declaration of the default fault handlers.
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//
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//*****************************************************************************
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void ResetISR(void);
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static void NmiSR(void);
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static void FaultISR(void);
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static void IntDefaultHandler(void);
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//*****************************************************************************
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//
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		||||
// External declaration for the reset handler that is to be called when the
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		||||
// processor is started
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//
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//*****************************************************************************
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extern void _c_int00(void);
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//*****************************************************************************
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//
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// Linker variable that marks the top of the stack.
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		||||
//
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		||||
//*****************************************************************************
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extern uint32_t __STACK_TOP;
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//*****************************************************************************
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//
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		||||
// External declarations for the interrupt handlers used by the application.
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//
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		||||
//*****************************************************************************
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// To be added by user
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		||||
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//*****************************************************************************
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		||||
//
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		||||
// The vector table.  Note that the proper constructs must be placed on this to
 | 
			
		||||
// ensure that it ends up at physical address 0x0000.0000 or at the start of
 | 
			
		||||
// the program if located at a start address other than 0.
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		||||
//
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//*****************************************************************************
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		||||
#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
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void (* const g_pfnVectors[])(void) =
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{
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    (void (*)(void))((uint32_t)&__STACK_TOP),
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                                            // The initial stack pointer
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    ResetISR,                               // The reset handler
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    NmiSR,                                  // The NMI handler
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    FaultISR,                               // The hard fault handler
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    IntDefaultHandler,                      // The MPU fault handler
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    IntDefaultHandler,                      // The bus fault handler
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    IntDefaultHandler,                      // The usage fault handler
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    IntDefaultHandler,                      // SVCall handler
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    IntDefaultHandler,                      // Debug monitor handler
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    0,                                      // Reserved
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    IntDefaultHandler,                      // The PendSV handler
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    IntDefaultHandler,                      // The SysTick handler
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    IntDefaultHandler,                      // GPIO Port A
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    IntDefaultHandler,                      // GPIO Port B
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    IntDefaultHandler,                      // GPIO Port C
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    IntDefaultHandler,                      // GPIO Port D
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    IntDefaultHandler,                      // GPIO Port E
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    IntDefaultHandler,                      // UART0 Rx and Tx
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    IntDefaultHandler,                      // UART1 Rx and Tx
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    IntDefaultHandler,                      // SSI0 Rx and Tx
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    IntDefaultHandler,                      // I2C0 Master and Slave
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    IntDefaultHandler,                      // PWM Fault
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    IntDefaultHandler,                      // PWM Generator 0
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    IntDefaultHandler,                      // PWM Generator 1
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    IntDefaultHandler,                      // PWM Generator 2
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    IntDefaultHandler,                      // Quadrature Encoder 0
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    IntDefaultHandler,                      // ADC Sequence 0
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    IntDefaultHandler,                      // ADC Sequence 1
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    IntDefaultHandler,                      // ADC Sequence 2
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    IntDefaultHandler,                      // ADC Sequence 3
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    IntDefaultHandler,                      // Watchdog timer
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    IntDefaultHandler,                      // Timer 0 subtimer A
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    IntDefaultHandler,                      // Timer 0 subtimer B
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    IntDefaultHandler,                      // Timer 1 subtimer A
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    IntDefaultHandler,                      // Timer 1 subtimer B
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    IntDefaultHandler,                      // Timer 2 subtimer A
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    IntDefaultHandler,                      // Timer 2 subtimer B
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    IntDefaultHandler,                      // Analog Comparator 0
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    IntDefaultHandler,                      // Analog Comparator 1
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    IntDefaultHandler,                      // Analog Comparator 2
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    IntDefaultHandler,                      // System Control (PLL, OSC, BO)
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    IntDefaultHandler,                      // FLASH Control
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    IntDefaultHandler,                      // GPIO Port F
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    IntDefaultHandler,                      // GPIO Port G
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    IntDefaultHandler,                      // GPIO Port H
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    IntDefaultHandler,                      // UART2 Rx and Tx
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    IntDefaultHandler,                      // SSI1 Rx and Tx
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    IntDefaultHandler,                      // Timer 3 subtimer A
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    IntDefaultHandler,                      // Timer 3 subtimer B
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    IntDefaultHandler,                      // I2C1 Master and Slave
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    IntDefaultHandler,                      // Quadrature Encoder 1
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    IntDefaultHandler,                      // CAN0
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    IntDefaultHandler,                      // CAN1
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    0,                                      // Reserved
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    0,                                      // Reserved
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    IntDefaultHandler,                      // Hibernate
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    IntDefaultHandler,                      // USB0
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    IntDefaultHandler,                      // PWM Generator 3
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    IntDefaultHandler,                      // uDMA Software Transfer
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    IntDefaultHandler,                      // uDMA Error
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    IntDefaultHandler,                      // ADC1 Sequence 0
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    IntDefaultHandler,                      // ADC1 Sequence 1
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    IntDefaultHandler,                      // ADC1 Sequence 2
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    IntDefaultHandler,                      // ADC1 Sequence 3
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    0,                                      // Reserved
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    0,                                      // Reserved
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    IntDefaultHandler,                      // GPIO Port J
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    IntDefaultHandler,                      // GPIO Port K
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    IntDefaultHandler,                      // GPIO Port L
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    IntDefaultHandler,                      // SSI2 Rx and Tx
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    IntDefaultHandler,                      // SSI3 Rx and Tx
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    IntDefaultHandler,                      // UART3 Rx and Tx
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    IntDefaultHandler,                      // UART4 Rx and Tx
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    IntDefaultHandler,                      // UART5 Rx and Tx
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    IntDefaultHandler,                      // UART6 Rx and Tx
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    IntDefaultHandler,                      // UART7 Rx and Tx
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    IntDefaultHandler,                      // I2C2 Master and Slave
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    IntDefaultHandler,                      // I2C3 Master and Slave
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    IntDefaultHandler,                      // Timer 4 subtimer A
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    IntDefaultHandler,                      // Timer 4 subtimer B
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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		||||
    0,                                      // Reserved
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    IntDefaultHandler,                      // Timer 5 subtimer A
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    IntDefaultHandler,                      // Timer 5 subtimer B
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    IntDefaultHandler,                      // Wide Timer 0 subtimer A
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    IntDefaultHandler,                      // Wide Timer 0 subtimer B
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    IntDefaultHandler,                      // Wide Timer 1 subtimer A
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    IntDefaultHandler,                      // Wide Timer 1 subtimer B
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    IntDefaultHandler,                      // Wide Timer 2 subtimer A
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    IntDefaultHandler,                      // Wide Timer 2 subtimer B
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    IntDefaultHandler,                      // Wide Timer 3 subtimer A
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    IntDefaultHandler,                      // Wide Timer 3 subtimer B
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    IntDefaultHandler,                      // Wide Timer 4 subtimer A
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    IntDefaultHandler,                      // Wide Timer 4 subtimer B
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    IntDefaultHandler,                      // Wide Timer 5 subtimer A
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    IntDefaultHandler,                      // Wide Timer 5 subtimer B
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    IntDefaultHandler,                      // FPU
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    0,                                      // Reserved
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    0,                                      // Reserved
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    IntDefaultHandler,                      // I2C4 Master and Slave
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    IntDefaultHandler,                      // I2C5 Master and Slave
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    IntDefaultHandler,                      // GPIO Port M
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    IntDefaultHandler,                      // GPIO Port N
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    IntDefaultHandler,                      // Quadrature Encoder 2
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		||||
    0,                                      // Reserved
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		||||
    0,                                      // Reserved
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		||||
    IntDefaultHandler,                      // GPIO Port P (Summary or P0)
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		||||
    IntDefaultHandler,                      // GPIO Port P1
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    IntDefaultHandler,                      // GPIO Port P2
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    IntDefaultHandler,                      // GPIO Port P3
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		||||
    IntDefaultHandler,                      // GPIO Port P4
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		||||
    IntDefaultHandler,                      // GPIO Port P5
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		||||
    IntDefaultHandler,                      // GPIO Port P6
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		||||
    IntDefaultHandler,                      // GPIO Port P7
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    IntDefaultHandler,                      // GPIO Port Q (Summary or Q0)
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		||||
    IntDefaultHandler,                      // GPIO Port Q1
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		||||
    IntDefaultHandler,                      // GPIO Port Q2
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		||||
    IntDefaultHandler,                      // GPIO Port Q3
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		||||
    IntDefaultHandler,                      // GPIO Port Q4
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		||||
    IntDefaultHandler,                      // GPIO Port Q5
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		||||
    IntDefaultHandler,                      // GPIO Port Q6
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		||||
    IntDefaultHandler,                      // GPIO Port Q7
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		||||
    IntDefaultHandler,                      // GPIO Port R
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    IntDefaultHandler,                      // GPIO Port S
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    IntDefaultHandler,                      // PWM 1 Generator 0
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    IntDefaultHandler,                      // PWM 1 Generator 1
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    IntDefaultHandler,                      // PWM 1 Generator 2
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    IntDefaultHandler,                      // PWM 1 Generator 3
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    IntDefaultHandler                       // PWM 1 Fault
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};
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//*****************************************************************************
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//
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// This is the code that gets called when the processor first starts execution
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// following a reset event.  Only the absolutely necessary set is performed,
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// after which the application supplied entry() routine is called.  Any fancy
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// actions (such as making decisions based on the reset cause register, and
 | 
			
		||||
// resetting the bits in that register) are left solely in the hands of the
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		||||
// application.
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//
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//*****************************************************************************
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void
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ResetISR(void)
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{
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    //
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    // Jump to the CCS C initialization routine.  This will enable the
 | 
			
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    // floating-point unit as well, so that does not need to be done here.
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    //
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    __asm("    .global _c_int00\n"
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          "    b.w     _c_int00");
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}
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives a NMI.  This
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// simply enters an infinite loop, preserving the system state for examination
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// by a debugger.
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		||||
//
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//*****************************************************************************
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static void
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NmiSR(void)
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{
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    //
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    // Enter an infinite loop.
 | 
			
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    //
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    while(1)
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    {
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    }
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}
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//*****************************************************************************
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//
 | 
			
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// This is the code that gets called when the processor receives a fault
 | 
			
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// interrupt.  This simply enters an infinite loop, preserving the system state
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		||||
// for examination by a debugger.
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		||||
//
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		||||
//*****************************************************************************
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		||||
static void
 | 
			
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FaultISR(void)
 | 
			
		||||
{
 | 
			
		||||
    //
 | 
			
		||||
    // Enter an infinite loop.
 | 
			
		||||
    //
 | 
			
		||||
    while(1)
 | 
			
		||||
    {
 | 
			
		||||
    }
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// This is the code that gets called when the processor receives an unexpected
 | 
			
		||||
// interrupt.  This simply enters an infinite loop, preserving the system state
 | 
			
		||||
// for examination by a debugger.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
static void
 | 
			
		||||
IntDefaultHandler(void)
 | 
			
		||||
{
 | 
			
		||||
    //
 | 
			
		||||
    // Go into an infinite loop.
 | 
			
		||||
    //
 | 
			
		||||
    while(1)
 | 
			
		||||
    {
 | 
			
		||||
    }
 | 
			
		||||
}
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// Startup code for use with TI's Code Composer Studio.
 | 
			
		||||
//
 | 
			
		||||
// Copyright (c) 2011-2014 Texas Instruments Incorporated.  All rights reserved.
 | 
			
		||||
// Software License Agreement
 | 
			
		||||
// 
 | 
			
		||||
// Software License Agreement
 | 
			
		||||
//
 | 
			
		||||
// Texas Instruments (TI) is supplying this software for use solely and
 | 
			
		||||
// exclusively on TI's microcontroller products. The software is owned by
 | 
			
		||||
// TI and/or its suppliers, and is protected under applicable copyright
 | 
			
		||||
// laws. You may not combine this software with "viral" open-source
 | 
			
		||||
// software in order to form a larger program.
 | 
			
		||||
//
 | 
			
		||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
 | 
			
		||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
 | 
			
		||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 | 
			
		||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
 | 
			
		||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
 | 
			
		||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
 | 
			
		||||
#include <stdint.h>
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// Forward declaration of the default fault handlers.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
void ResetISR(void);
 | 
			
		||||
static void NmiSR(void);
 | 
			
		||||
static void FaultISR(void);
 | 
			
		||||
static void IntDefaultHandler(void);
 | 
			
		||||
void SystickHandler(void);
 | 
			
		||||
void GPIOF_interruptHandler(void);
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// External declaration for the reset handler that is to be called when the
 | 
			
		||||
// processor is started
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
extern void _c_int00(void);
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// Linker variable that marks the top of the stack.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
extern uint32_t __STACK_TOP;
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// External declarations for the interrupt handlers used by the application.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
// To be added by user
 | 
			
		||||
extern void SystickHandler(void);
 | 
			
		||||
extern void GPIOF_interruptHandler(void);
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// The vector table.  Note that the proper constructs must be placed on this to
 | 
			
		||||
// ensure that it ends up at physical address 0x0000.0000 or at the start of
 | 
			
		||||
// the program if located at a start address other than 0.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
 | 
			
		||||
void (* const g_pfnVectors[])(void) =
 | 
			
		||||
{
 | 
			
		||||
    (void (*)(void))((uint32_t)&__STACK_TOP),
 | 
			
		||||
                                            // The initial stack pointer
 | 
			
		||||
    ResetISR,                               // The reset handler
 | 
			
		||||
    NmiSR,                                  // The NMI handler
 | 
			
		||||
    FaultISR,                               // The hard fault handler
 | 
			
		||||
    IntDefaultHandler,                      // The MPU fault handler
 | 
			
		||||
    IntDefaultHandler,                      // The bus fault handler
 | 
			
		||||
    IntDefaultHandler,                      // The usage fault handler
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // SVCall handler
 | 
			
		||||
    IntDefaultHandler,                      // Debug monitor handler
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // The PendSV handler
 | 
			
		||||
    SystickHandler,                         // The SysTick handler
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port A
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port B
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port C
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port D
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port E
 | 
			
		||||
    IntDefaultHandler,                      // UART0 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // UART1 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // SSI0 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // I2C0 Master and Slave
 | 
			
		||||
    IntDefaultHandler,                      // PWM Fault
 | 
			
		||||
    IntDefaultHandler,                      // PWM Generator 0
 | 
			
		||||
    IntDefaultHandler,                      // PWM Generator 1
 | 
			
		||||
    IntDefaultHandler,                      // PWM Generator 2
 | 
			
		||||
    IntDefaultHandler,                      // Quadrature Encoder 0
 | 
			
		||||
    IntDefaultHandler,                      // ADC Sequence 0
 | 
			
		||||
    IntDefaultHandler,                      // ADC Sequence 1
 | 
			
		||||
    IntDefaultHandler,                      // ADC Sequence 2
 | 
			
		||||
    IntDefaultHandler,                      // ADC Sequence 3
 | 
			
		||||
    IntDefaultHandler,                      // Watchdog timer
 | 
			
		||||
    IntDefaultHandler,                      // Timer 0 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Timer 0 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Timer 1 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Timer 1 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Timer 2 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Timer 2 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Analog Comparator 0
 | 
			
		||||
    IntDefaultHandler,                      // Analog Comparator 1
 | 
			
		||||
    IntDefaultHandler,                      // Analog Comparator 2
 | 
			
		||||
    IntDefaultHandler,                      // System Control (PLL, OSC, BO)
 | 
			
		||||
    IntDefaultHandler,                      // FLASH Control
 | 
			
		||||
    GPIOF_interruptHandler,                 // GPIO Port F
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port G
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port H
 | 
			
		||||
    IntDefaultHandler,                      // UART2 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // SSI1 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // Timer 3 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Timer 3 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // I2C1 Master and Slave
 | 
			
		||||
    IntDefaultHandler,                      // Quadrature Encoder 1
 | 
			
		||||
    IntDefaultHandler,                      // CAN0
 | 
			
		||||
    IntDefaultHandler,                      // CAN1
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // Hibernate
 | 
			
		||||
    IntDefaultHandler,                      // USB0
 | 
			
		||||
    IntDefaultHandler,                      // PWM Generator 3
 | 
			
		||||
    IntDefaultHandler,                      // uDMA Software Transfer
 | 
			
		||||
    IntDefaultHandler,                      // uDMA Error
 | 
			
		||||
    IntDefaultHandler,                      // ADC1 Sequence 0
 | 
			
		||||
    IntDefaultHandler,                      // ADC1 Sequence 1
 | 
			
		||||
    IntDefaultHandler,                      // ADC1 Sequence 2
 | 
			
		||||
    IntDefaultHandler,                      // ADC1 Sequence 3
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port J
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port K
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port L
 | 
			
		||||
    IntDefaultHandler,                      // SSI2 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // SSI3 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // UART3 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // UART4 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // UART5 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // UART6 Rx and Tx
 | 
			
		||||
    IntDefaultHandler,                      // UART7 Rx and Tx
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // I2C2 Master and Slave
 | 
			
		||||
    IntDefaultHandler,                      // I2C3 Master and Slave
 | 
			
		||||
    IntDefaultHandler,                      // Timer 4 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Timer 4 subtimer B
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // Timer 5 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Timer 5 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 0 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 0 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 1 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 1 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 2 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 2 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 3 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 3 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 4 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 4 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 5 subtimer A
 | 
			
		||||
    IntDefaultHandler,                      // Wide Timer 5 subtimer B
 | 
			
		||||
    IntDefaultHandler,                      // FPU
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // I2C4 Master and Slave
 | 
			
		||||
    IntDefaultHandler,                      // I2C5 Master and Slave
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port M
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port N
 | 
			
		||||
    IntDefaultHandler,                      // Quadrature Encoder 2
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    0,                                      // Reserved
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P (Summary or P0)
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P1
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P2
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P3
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P4
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P5
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P6
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port P7
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q (Summary or Q0)
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q1
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q2
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q3
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q4
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q5
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q6
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port Q7
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port R
 | 
			
		||||
    IntDefaultHandler,                      // GPIO Port S
 | 
			
		||||
    IntDefaultHandler,                      // PWM 1 Generator 0
 | 
			
		||||
    IntDefaultHandler,                      // PWM 1 Generator 1
 | 
			
		||||
    IntDefaultHandler,                      // PWM 1 Generator 2
 | 
			
		||||
    IntDefaultHandler,                      // PWM 1 Generator 3
 | 
			
		||||
    IntDefaultHandler                       // PWM 1 Fault
 | 
			
		||||
};
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// This is the code that gets called when the processor first starts execution
 | 
			
		||||
// following a reset event.  Only the absolutely necessary set is performed,
 | 
			
		||||
// after which the application supplied entry() routine is called.  Any fancy
 | 
			
		||||
// actions (such as making decisions based on the reset cause register, and
 | 
			
		||||
// resetting the bits in that register) are left solely in the hands of the
 | 
			
		||||
// application.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
void
 | 
			
		||||
ResetISR(void)
 | 
			
		||||
{
 | 
			
		||||
    //
 | 
			
		||||
    // Jump to the CCS C initialization routine.  This will enable the
 | 
			
		||||
    // floating-point unit as well, so that does not need to be done here.
 | 
			
		||||
    //
 | 
			
		||||
    __asm("    .global _c_int00\n"
 | 
			
		||||
          "    b.w     _c_int00");
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// This is the code that gets called when the processor receives a NMI.  This
 | 
			
		||||
// simply enters an infinite loop, preserving the system state for examination
 | 
			
		||||
// by a debugger.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
static void
 | 
			
		||||
NmiSR(void)
 | 
			
		||||
{
 | 
			
		||||
    //
 | 
			
		||||
    // Enter an infinite loop.
 | 
			
		||||
    //
 | 
			
		||||
    while(1)
 | 
			
		||||
    {
 | 
			
		||||
    }
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// This is the code that gets called when the processor receives a fault
 | 
			
		||||
// interrupt.  This simply enters an infinite loop, preserving the system state
 | 
			
		||||
// for examination by a debugger.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
static void
 | 
			
		||||
FaultISR(void)
 | 
			
		||||
{
 | 
			
		||||
    //
 | 
			
		||||
    // Enter an infinite loop.
 | 
			
		||||
    //
 | 
			
		||||
    while(1)
 | 
			
		||||
    {
 | 
			
		||||
    }
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
//
 | 
			
		||||
// This is the code that gets called when the processor receives an unexpected
 | 
			
		||||
// interrupt.  This simply enters an infinite loop, preserving the system state
 | 
			
		||||
// for examination by a debugger.
 | 
			
		||||
//
 | 
			
		||||
//*****************************************************************************
 | 
			
		||||
static void
 | 
			
		||||
IntDefaultHandler(void)
 | 
			
		||||
{
 | 
			
		||||
    //
 | 
			
		||||
    // Go into an infinite loop.
 | 
			
		||||
    //
 | 
			
		||||
    while(1)
 | 
			
		||||
    {
 | 
			
		||||
    }
 | 
			
		||||
}
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
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		Reference in New Issue