Group05_Lab06_Task2/Lab6_Task2.c

118 lines
2.6 KiB
C

#include <stdint.h>
#include <stdbool.h>
#include "tm4c123gh6pm.h"
#define STCTRL *((volatile long *) 0xE000E010)
#define STRELOAD *((volatile long *) 0xE000E014)
#define STCURRENT *((volatile long *) 0xE000E018)
#define COUNT_FLAG (1 << 16)
#define ENABLE (1 << 0)
#define CLKINT (1 << 2)
#define MASK_BITS 0x11
void GPIOF_config(void);
void GPIOF_int_config(void);
void main(void)
{
SYSCTL_RCC_R &= ~(1 << 20);
SYSCTL_RCGC0_R |= 0x00100000;
SYSCTL_RCGCPWM_R = 0x3;
SYSCTL_RCGC2_R |= 0x20;
GPIO_PORTF_LOCK_R = 0x4C4F434B; /* unlock commit register*/
GPIO_PORTF_CR_R = 0x1F;
GPIO_PORTF_DEN_R= 0x1F;
GPIO_PORTF_DIR_R= 0x0E;
GPIO_PORTF_PUR_R = 0x11;
GPIOF_config();
GPIOF_Interrupt_config();
GPIO_PORTF_AFSEL_R |= 0x02;
GPIO_PORTF_PCTL_R |= 0x50;
PWM1_2_CTL_R= 0x00000000; //PWM module 1, generator 2 is disabled
PWM1_2_GENB_R |= 0x80E; //PWM module 1 , generator 2 signal B , invert on compB down count,high on load and low on zero
PWM1_2_LOAD_R = 0xA0; //load value is 160 for 100kHz signal
PWM1_2_CMPB_R = 0x50; //compA value is 80 for 50% duty cycle
PWM1_2_CTL_R |=0x01; //pwm block is enabled
PWM1_ENABLE_R |=(1<<5); //m1pwm5 signal is given to the pin
while(1);
}
void GPIOF_int_config()
{
GPIO_PORTF_IM_R &= ~MASK_BITS;
GPIO_PORTF_IS_R &= ~MASK_BITS;
GPIO_PORTF_IBE_R |= MASK_BITS;
NVIC_PRI7_R = (NVIC_PRI7_R & 0xFF1FFFFF) | (2 << 21);
NVIC_EN0_R |= (1 << 30);
GPIO_PORTF_ICR_R = MASK_BITS;
GPIO_PORTF_IM_R |= MASK_BITS;
}
void GPIOF_INT_Handler(void)
{
GPIO_PORTF_IM_R &= ~MASK_BITS;
int i;
if(GPIO_PORTF_RIS_R & ~MASK_BITS)
{
for(i=0;i<160000;i++){}
if(~(GPIO_PORTF_DATA_R)&0x01)
{
STCURRENT = 0;
STRELOAD = 1000000*8;
STCTRL |= (CLKINT | ENABLE);
}
else
{
if(STCTRL & COUNT_FLAG)
{
STCTRL = 0;
if(PWM1_2_CMPB_R < 155)
{
PWM1_2_CMPB_R += 5;
}
}
else
{
STCTRL = 0;
if(PWM1_2_CMPB_R > 5)
{
PWM1_2_CMPB_R -= 5;
}
}
}
}
GPIO_PORTF_ICR_R = MASK_BITS;
GPIO_PORTF_IM_R |= MASK_BITS;
}