EE23MT015
/
Group05_Lab06_Task2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Added GPIO portf interrupt copnfiguration

This commit is contained in:
Rajput R Vikramsingh Vikramsingh 2024-09-22 16:03:01 +05:30
parent 36a1962070
commit 3c6628a463
1 changed files with 15 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
Lab6_Task2.c
View File

@ -11,7 +11,7 @@
#define ENABLE (1 << 0)
#define CLKINT (1 << 2)
#define MASK_BITS 0x1
#define MASK_BITS 0x11
void GPIOF_config(void);
void GPIOF_int_config(void);
@ -36,21 +36,26 @@ void main(void)
GPIO_PORTF_AFSEL_R |= 0x02;
GPIO_PORTF_PCTL_R |= 0x50;
PWM1_2_CTL_R= 0x00000000;
PWM1_2_GENB_R |= 0x80E;
PWM1_2_LOAD_R = 0xA0;
PWM1_2_CMPB_R = 0x50;
PWM1_2_CTL_R |=0x01;
PWM1_ENABLE_R |=(1<<5);
PWM1_2_CTL_R= 0x00000000; //PWM module 1, generator 2 is disabled
PWM1_2_GENB_R |= 0x80E; //PWM module 1 , generator 2 signal B , invert on compB down count,high on load and low on zero
PWM1_2_LOAD_R = 0xA0; //load value is 160 for 100kHz signal
PWM1_2_CMPB_R = 0x50; //compA value is 80 for 50% duty cycle
PWM1_2_CTL_R |=0x01; //pwm block is enabled
PWM1_ENABLE_R |=(1<<5); //m1pwm5 signal is given to the pin
while(1);
}
void GPIOF_config()
void GPIOF_int_config()
{
GPIO_PORTF_IM_R &= ~MASK_BITS;
GPIO_PORTF_IS_R &= ~MASK_BITS;
GPIO_PORTF_IBE_R |= MASK_BITS;
NVIC_PRI7_R = (NVIC_PRI7_R & 0xFF1FFFFF) | (2 << 21);
NVIC_EN0_R |= (1 << 30);
GPIO_PORTF_ICR_R = MASK_BITS;
GPIO_PORTF_IM_R |= MASK_BITS;
}