Modification

This commit is contained in:
Rajput R Vikramsingh Vikramsingh 2024-11-25 12:03:43 +05:30
parent f11cea27a4
commit d463406438
1 changed files with 5 additions and 4 deletions

9
main.c
View File

@ -36,7 +36,7 @@ int main(void) {
void PortF_Init(void) {
SYSCTL_RCGCGPIO_R |= (1U << 5); // Enable clock for Port F // SYSCTL_RCGC2_R |= 0x00000020;
while ((SYSCTL_PRGPIO_R & (1U << 5)) == 0); // Wait for Port F to be ready
// while ((SYSCTL_PRGPIO_R & (1U << 5)) == 0); // Wait for Port F to be ready
GPIO_PORTF_DIR_R |= 0x01; // Set PF1 as output
GPIO_PORTF_DEN_R |= 0x01; // Enable digital function for PF1
@ -47,7 +47,7 @@ void PortF_Init(void) {
void ADC0_Init(void) {
SYSCTL_RCGCADC_R |= 0x01; // Enable ADC0 clock
SYSCTL_RCGCGPIO_R |= 0x10; // Enable clock for Port E
while ((SYSCTL_PRGPIO_R & (1U << 4)) == 0); // Wait for Port E to be ready
// while ((SYSCTL_PRGPIO_R & (1U << 4)) == 0); // Wait for Port E to be ready
GPIO_PORTE_AFSEL_R |= (1U << 3); // Enable alternate function on PE3
GPIO_PORTE_DEN_R &= ~(1U << 3); // Disable digital I/O on PE3
@ -60,10 +60,11 @@ void ADC0_Init(void) {
ADC0_ACTSS_R |= 8; // Enable sample sequencer 3
}
uint16_t ADC0_Read(void) {
uint16_t ADC0_Read(void)
{
ADC0_PSSI_R = 8; // Start sampling on SS3
while ((ADC0_RIS_R & 8) == 0); // Wait for conversion to complete
uint16_t result = ADC0_SSFIFO3_R & 0xFFF; // Read 12-bit ADC value
ADC0_ISC_R = 8; // Clear the completion flag
return result;
}
}