MTL_Monitor/tests/washing_machine/properties/vhdl_prop3/Prop3.topEntity/topEntity.vhdl

879 lines
37 KiB
VHDL

-- Automatically generated VHDL-93
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.MATH_REAL.ALL;
use std.textio.all;
use work.all;
use work.Prop3_topEntity_types.all;
entity topEntity is
port(-- clock
clk : in Prop3_topEntity_types.clk_System;
-- reset
rst : in Prop3_topEntity_types.rst_System;
-- enable
en : in Prop3_topEntity_types.en_System;
eta1_0 : in boolean;
eta1_1 : in boolean;
result : out boolean);
end;
architecture structural of topEntity is
-- prop3.hs:8:1-44
signal \c$ds_app_arg\ : Prop3_topEntity_types.array_of_signed_2(0 to 0) := Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
signal \c$case_alt\ : signed(1 downto 0);
signal \c$case_alt_0\ : signed(1 downto 0);
signal \c$case_alt_1\ : signed(1 downto 0);
signal \c$case_alt_2\ : signed(1 downto 0);
signal \c$case_alt_3\ : signed(1 downto 0);
-- Queue.hs:20:1-12
signal fm1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal fm2 : unsigned(4 downto 0);
signal \c$app_arg\ : boolean;
-- Queue.hs:20:1-12
signal tm1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tm2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt2 : unsigned(4 downto 0);
signal \c$app_arg_0\ : signed(1 downto 0);
signal result_1 : Prop3_topEntity_types.Tup2;
-- prop3.hs:13:1-124
signal \c$ds_app_arg_0\ : Prop3_topEntity_types.Tup3 := ( Tup3_sel0_unsigned => to_unsigned(0,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(0,5)
, Tup10_sel1_unsigned_1 => to_unsigned(0,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(0,5)
, Tup10_sel3_unsigned_3 => to_unsigned(0,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
signal result_2 : Prop3_topEntity_types.Tup10;
signal result_3 : Prop3_topEntity_types.Tup2_0;
-- ProcessingElement.hs:9:1-777
signal opcode : unsigned(0 downto 0);
-- ProcessingElement.hs:9:1-777
signal ds4 : Prop3_topEntity_types.Tup10;
-- prop3.hs:8:1-44
signal \c$ds_app_arg_1\ : Prop3_topEntity_types.array_of_signed_2(0 to 0) := Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
signal result_4 : boolean;
signal \c$case_alt_4\ : signed(1 downto 0);
signal \c$case_alt_5\ : signed(1 downto 0);
signal \c$case_alt_6\ : signed(1 downto 0);
signal \c$case_alt_7\ : signed(1 downto 0);
signal \c$case_alt_8\ : signed(1 downto 0);
-- Queue.hs:20:1-12
signal fm1_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal fm2_0 : unsigned(4 downto 0);
signal \c$app_arg_1\ : boolean;
-- Queue.hs:20:1-12
signal tm1_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tm2_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm1_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm2_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff1_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff2_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt1_0 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt2_0 : unsigned(4 downto 0);
signal \c$app_arg_2\ : signed(1 downto 0);
signal result_5 : Prop3_topEntity_types.Tup2;
-- prop3.hs:17:1-122
signal \c$ds_app_arg_2\ : Prop3_topEntity_types.Tup3 := ( Tup3_sel0_unsigned => to_unsigned(1,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(1,5)
, Tup10_sel1_unsigned_1 => to_unsigned(1,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(0,5)
, Tup10_sel5_unsigned_5 => to_unsigned(0,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(1,5)
, Tup10_sel3_unsigned_3 => to_unsigned(1,5)
, Tup10_sel4_unsigned_4 => to_unsigned(0,5)
, Tup10_sel5_unsigned_5 => to_unsigned(0,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
signal result_6 : Prop3_topEntity_types.Tup10;
signal result_7 : Prop3_topEntity_types.Tup2_0;
-- ProcessingElement.hs:9:1-777
signal opcode_0 : unsigned(0 downto 0);
-- ProcessingElement.hs:9:1-777
signal ds4_0 : Prop3_topEntity_types.Tup10;
-- prop3.hs:8:1-44
signal \c$ds_app_arg_3\ : Prop3_topEntity_types.array_of_signed_2(0 to 0) := Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
signal result_8 : boolean;
signal \c$case_alt_9\ : signed(1 downto 0);
signal \c$case_alt_10\ : signed(1 downto 0);
signal \c$case_alt_11\ : signed(1 downto 0);
signal \c$case_alt_12\ : signed(1 downto 0);
signal \c$case_alt_13\ : signed(1 downto 0);
-- Queue.hs:20:1-12
signal fm1_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal fm2_1 : unsigned(4 downto 0);
signal \c$app_arg_3\ : boolean;
-- Queue.hs:20:1-12
signal tm1_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tm2_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm1_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm2_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff1_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff2_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt1_1 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt2_1 : unsigned(4 downto 0);
signal \c$app_arg_4\ : signed(1 downto 0);
signal result_9 : Prop3_topEntity_types.Tup2;
-- prop3.hs:13:1-124
signal \c$ds_app_arg_4\ : Prop3_topEntity_types.Tup3 := ( Tup3_sel0_unsigned => to_unsigned(0,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(0,5)
, Tup10_sel1_unsigned_1 => to_unsigned(0,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(0,5)
, Tup10_sel3_unsigned_3 => to_unsigned(0,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
signal result_10 : Prop3_topEntity_types.Tup10;
signal result_11 : Prop3_topEntity_types.Tup2_0;
-- ProcessingElement.hs:9:1-777
signal opcode_1 : unsigned(0 downto 0);
-- ProcessingElement.hs:9:1-777
signal input1 : boolean;
-- ProcessingElement.hs:9:1-777
signal input2 : boolean;
-- ProcessingElement.hs:9:1-777
signal ds4_1 : Prop3_topEntity_types.Tup10;
-- prop3.hs:8:1-44
signal \c$ds_app_arg_5\ : Prop3_topEntity_types.array_of_signed_2(0 to 0) := Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
signal result_12 : boolean;
signal \c$case_alt_14\ : signed(1 downto 0);
signal \c$case_alt_15\ : signed(1 downto 0);
signal \c$case_alt_16\ : signed(1 downto 0);
signal \c$case_alt_17\ : signed(1 downto 0);
signal \c$case_alt_18\ : signed(1 downto 0);
-- Queue.hs:20:1-12
signal fm1_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal fm2_2 : unsigned(4 downto 0);
signal \c$app_arg_5\ : boolean;
-- Queue.hs:20:1-12
signal tm1_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tm2_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm1_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal mm2_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff1_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal ff2_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt1_2 : unsigned(4 downto 0);
-- Queue.hs:20:1-12
signal tt2_2 : unsigned(4 downto 0);
signal \c$app_arg_6\ : signed(1 downto 0);
signal result_13 : Prop3_topEntity_types.Tup2;
-- prop3.hs:15:1-125
signal \c$ds_app_arg_6\ : Prop3_topEntity_types.Tup3 := ( Tup3_sel0_unsigned => to_unsigned(1,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(0,5)
, Tup10_sel3_unsigned_3 => to_unsigned(0,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(0,5)
, Tup10_sel1_unsigned_1 => to_unsigned(0,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
signal result_14 : Prop3_topEntity_types.Tup10;
signal result_15 : Prop3_topEntity_types.Tup2_0;
-- ProcessingElement.hs:9:1-777
signal opcode_2 : unsigned(0 downto 0);
-- ProcessingElement.hs:9:1-777
signal ds4_2 : Prop3_topEntity_types.Tup10;
-- prop3.hs:19:1-332
signal inp1 : boolean;
signal eta1 : Prop3_topEntity_types.Tup2_1;
signal \c$case_alt_selection_res\ : boolean;
signal \c$case_alt_selection_res_0\ : boolean;
signal \c$case_alt_selection_res_1\ : boolean;
signal \c$case_alt_selection_res_2\ : boolean;
signal \c$case_alt_selection_res_3\ : boolean;
signal \c$vec\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$case_alt_sel_alt_9\ : Prop3_topEntity_types.Tup2_2;
signal \c$vec_0\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$app_arg_9\ : Prop3_topEntity_types.Tup2_2;
signal ds4_selection_res : boolean;
signal \c$case_alt_selection_res_4\ : boolean;
signal \c$case_alt_selection_res_5\ : boolean;
signal \c$case_alt_selection_res_6\ : boolean;
signal \c$case_alt_selection_res_7\ : boolean;
signal \c$case_alt_selection_res_8\ : boolean;
signal \c$vec_1\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$case_alt_sel_alt_21\ : Prop3_topEntity_types.Tup2_2;
signal \c$vec_2\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$app_arg_1_2\ : Prop3_topEntity_types.Tup2_2;
signal ds4_selection_res_0 : boolean;
signal \c$case_alt_selection_res_9\ : boolean;
signal \c$case_alt_selection_res_10\ : boolean;
signal \c$case_alt_selection_res_11\ : boolean;
signal \c$case_alt_selection_res_12\ : boolean;
signal \c$case_alt_selection_res_13\ : boolean;
signal \c$vec_3\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$case_alt_sel_alt_33\ : Prop3_topEntity_types.Tup2_2;
signal \c$vec_4\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$app_arg_3_5\ : Prop3_topEntity_types.Tup2_2;
signal ds4_selection_res_1 : boolean;
signal \c$case_alt_selection_res_14\ : boolean;
signal \c$case_alt_selection_res_15\ : boolean;
signal \c$case_alt_selection_res_16\ : boolean;
signal \c$case_alt_selection_res_17\ : boolean;
signal \c$case_alt_selection_res_18\ : boolean;
signal \c$vec_5\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$case_alt_sel_alt_45\ : Prop3_topEntity_types.Tup2_2;
signal \c$vec_6\ : Prop3_topEntity_types.array_of_signed_2(0 to 1);
signal \c$app_arg_5_8\ : Prop3_topEntity_types.Tup2_2;
signal ds4_selection_res_2 : boolean;
begin
eta1 <= ( Tup2_1_sel0_boolean_0 => eta1_0
, Tup2_1_sel1_boolean_1 => eta1_1 );
-- register begin
cds_app_arg_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg\ <= Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
elsif rising_edge(clk) then
if en then
\c$ds_app_arg\ <= result_1.Tup2_sel0_array_of_signed_2;
end if;
end if;
end process;
-- register end
result <= result_1.Tup2_sel1_boolean;
\c$case_alt_selection_res\ <= (to_unsigned(0,5) <= tt2) and (to_unsigned(0,5) >= tt1);
\c$case_alt\ <= to_signed(1,2) when \c$case_alt_selection_res\ else
\c$case_alt_0\;
\c$case_alt_selection_res_0\ <= (to_unsigned(0,5) <= ff2) and (to_unsigned(0,5) >= ff1);
\c$case_alt_0\ <= to_signed(-1,2) when \c$case_alt_selection_res_0\ else
\c$case_alt_1\;
\c$case_alt_selection_res_1\ <= (to_unsigned(0,5) <= mm2) and (to_unsigned(0,5) >= mm1);
\c$case_alt_1\ <= to_signed(0,2) when \c$case_alt_selection_res_1\ else
\c$case_alt_2\;
\c$case_alt_selection_res_2\ <= (to_unsigned(0,5) <= tm2) and ((to_unsigned(0,5) >= tm1) and \c$app_arg\);
\c$case_alt_2\ <= to_signed(1,2) when \c$case_alt_selection_res_2\ else
\c$case_alt_3\;
\c$case_alt_selection_res_3\ <= (to_unsigned(0,5) <= fm2) and ((to_unsigned(0,5) >= fm1) and \c$app_arg\);
\c$vec\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg\)));
\c$case_alt_sel_alt_9\ <= (\c$vec\(0 to 1-1),\c$vec\(1 to \c$vec\'high));
\c$case_alt_3\ <= to_signed(-1,2) when \c$case_alt_selection_res_3\ else
\c$case_alt_sel_alt_9\.Tup2_2_sel0_array_of_signed_2_0(0);
fm1 <= result_2.Tup10_sel8_unsigned_8;
fm2 <= result_2.Tup10_sel9_unsigned_9;
\c$vec_0\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg\)));
\c$app_arg_9\ <= (\c$vec_0\(0 to 1-1),\c$vec_0\(1 to \c$vec_0\'high));
\c$app_arg\ <= \c$app_arg_9\.Tup2_2_sel0_array_of_signed_2_0(0) = to_signed(0,2);
tm1 <= result_2.Tup10_sel6_unsigned_6;
tm2 <= result_2.Tup10_sel7_unsigned_7;
mm1 <= result_2.Tup10_sel4_unsigned_4;
mm2 <= result_2.Tup10_sel5_unsigned_5;
ff1 <= result_2.Tup10_sel2_unsigned_2;
ff2 <= result_2.Tup10_sel3_unsigned_3;
tt1 <= result_2.Tup10_sel0_unsigned_0;
tt2 <= result_2.Tup10_sel1_unsigned_1;
-- index begin
indexVec : block
signal vec_index : integer range 0 to 1-1;
begin
vec_index <= to_integer(to_signed(0,64))
-- pragma translate_off
mod 1
-- pragma translate_on
;
\c$app_arg_0\ <= \c$ds_app_arg\(vec_index);
end block;
-- index end
result_1 <= ( Tup2_sel0_array_of_signed_2 => Prop3_topEntity_types.array_of_signed_2'(0 => \c$case_alt\)
, Tup2_sel1_boolean => \c$app_arg_0\ = to_signed(1,2) );
-- register begin
cds_app_arg_0_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg_0\ <= ( Tup3_sel0_unsigned => to_unsigned(0,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(0,5)
, Tup10_sel1_unsigned_1 => to_unsigned(0,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(0,5)
, Tup10_sel3_unsigned_3 => to_unsigned(0,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
elsif rising_edge(clk) then
if en then
\c$ds_app_arg_0\ <= result_3.Tup2_0_sel0_Tup3;
end if;
end if;
end process;
-- register end
result_2 <= result_3.Tup2_0_sel1_Tup10;
result_3 <= ( Tup2_0_sel0_Tup3 => \c$ds_app_arg_0\
, Tup2_0_sel1_Tup10 => ( Tup10_sel0_unsigned_0 => ds4.Tup10_sel0_unsigned_0
, Tup10_sel1_unsigned_1 => ds4.Tup10_sel1_unsigned_1
, Tup10_sel2_unsigned_2 => ds4.Tup10_sel2_unsigned_2
, Tup10_sel3_unsigned_3 => ds4.Tup10_sel3_unsigned_3
, Tup10_sel4_unsigned_4 => ds4.Tup10_sel4_unsigned_4
, Tup10_sel5_unsigned_5 => ds4.Tup10_sel5_unsigned_5
, Tup10_sel6_unsigned_6 => ds4.Tup10_sel6_unsigned_6
, Tup10_sel7_unsigned_7 => ds4.Tup10_sel7_unsigned_7
, Tup10_sel8_unsigned_8 => ds4.Tup10_sel8_unsigned_8
, Tup10_sel9_unsigned_9 => ds4.Tup10_sel9_unsigned_9 ) );
opcode <= \c$ds_app_arg_0\.Tup3_sel0_unsigned;
ds4_selection_res <= ((opcode = to_unsigned(0,1)) and (result_12 or result_4)) or ((opcode = to_unsigned(1,1)) and result_12);
ds4 <= \c$ds_app_arg_0\.Tup3_sel1_Tup10_0 when ds4_selection_res else
\c$ds_app_arg_0\.Tup3_sel2_Tup10_1;
-- register begin
cds_app_arg_1_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg_1\ <= Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
elsif rising_edge(clk) then
if en then
\c$ds_app_arg_1\ <= result_5.Tup2_sel0_array_of_signed_2;
end if;
end if;
end process;
-- register end
result_4 <= result_5.Tup2_sel1_boolean;
\c$case_alt_selection_res_4\ <= (to_unsigned(0,5) <= tt2_0) and (to_unsigned(0,5) >= tt1_0);
\c$case_alt_4\ <= to_signed(1,2) when \c$case_alt_selection_res_4\ else
\c$case_alt_5\;
\c$case_alt_selection_res_5\ <= (to_unsigned(0,5) <= ff2_0) and (to_unsigned(0,5) >= ff1_0);
\c$case_alt_5\ <= to_signed(-1,2) when \c$case_alt_selection_res_5\ else
\c$case_alt_6\;
\c$case_alt_selection_res_6\ <= (to_unsigned(0,5) <= mm2_0) and (to_unsigned(0,5) >= mm1_0);
\c$case_alt_6\ <= to_signed(0,2) when \c$case_alt_selection_res_6\ else
\c$case_alt_7\;
\c$case_alt_selection_res_7\ <= (to_unsigned(0,5) <= tm2_0) and ((to_unsigned(0,5) >= tm1_0) and \c$app_arg_1\);
\c$case_alt_7\ <= to_signed(1,2) when \c$case_alt_selection_res_7\ else
\c$case_alt_8\;
\c$case_alt_selection_res_8\ <= (to_unsigned(0,5) <= fm2_0) and ((to_unsigned(0,5) >= fm1_0) and \c$app_arg_1\);
\c$vec_1\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg_1\)));
\c$case_alt_sel_alt_21\ <= (\c$vec_1\(0 to 1-1),\c$vec_1\(1 to \c$vec_1\'high));
\c$case_alt_8\ <= to_signed(-1,2) when \c$case_alt_selection_res_8\ else
\c$case_alt_sel_alt_21\.Tup2_2_sel0_array_of_signed_2_0(0);
fm1_0 <= result_6.Tup10_sel8_unsigned_8;
fm2_0 <= result_6.Tup10_sel9_unsigned_9;
\c$vec_2\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg_1\)));
\c$app_arg_1_2\ <= (\c$vec_2\(0 to 1-1),\c$vec_2\(1 to \c$vec_2\'high));
\c$app_arg_1\ <= \c$app_arg_1_2\.Tup2_2_sel0_array_of_signed_2_0(0) = to_signed(0,2);
tm1_0 <= result_6.Tup10_sel6_unsigned_6;
tm2_0 <= result_6.Tup10_sel7_unsigned_7;
mm1_0 <= result_6.Tup10_sel4_unsigned_4;
mm2_0 <= result_6.Tup10_sel5_unsigned_5;
ff1_0 <= result_6.Tup10_sel2_unsigned_2;
ff2_0 <= result_6.Tup10_sel3_unsigned_3;
tt1_0 <= result_6.Tup10_sel0_unsigned_0;
tt2_0 <= result_6.Tup10_sel1_unsigned_1;
-- index begin
indexVec_0 : block
signal vec_index_0 : integer range 0 to 1-1;
begin
vec_index_0 <= to_integer(to_signed(0,64))
-- pragma translate_off
mod 1
-- pragma translate_on
;
\c$app_arg_2\ <= \c$ds_app_arg_1\(vec_index_0);
end block;
-- index end
result_5 <= ( Tup2_sel0_array_of_signed_2 => Prop3_topEntity_types.array_of_signed_2'(0 => \c$case_alt_4\)
, Tup2_sel1_boolean => \c$app_arg_2\ = to_signed(1,2) );
-- register begin
cds_app_arg_2_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg_2\ <= ( Tup3_sel0_unsigned => to_unsigned(1,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(1,5)
, Tup10_sel1_unsigned_1 => to_unsigned(1,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(0,5)
, Tup10_sel5_unsigned_5 => to_unsigned(0,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(1,5)
, Tup10_sel3_unsigned_3 => to_unsigned(1,5)
, Tup10_sel4_unsigned_4 => to_unsigned(0,5)
, Tup10_sel5_unsigned_5 => to_unsigned(0,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
elsif rising_edge(clk) then
if en then
\c$ds_app_arg_2\ <= result_7.Tup2_0_sel0_Tup3;
end if;
end if;
end process;
-- register end
result_6 <= result_7.Tup2_0_sel1_Tup10;
result_7 <= ( Tup2_0_sel0_Tup3 => \c$ds_app_arg_2\
, Tup2_0_sel1_Tup10 => ( Tup10_sel0_unsigned_0 => ds4_0.Tup10_sel0_unsigned_0
, Tup10_sel1_unsigned_1 => ds4_0.Tup10_sel1_unsigned_1
, Tup10_sel2_unsigned_2 => ds4_0.Tup10_sel2_unsigned_2
, Tup10_sel3_unsigned_3 => ds4_0.Tup10_sel3_unsigned_3
, Tup10_sel4_unsigned_4 => ds4_0.Tup10_sel4_unsigned_4
, Tup10_sel5_unsigned_5 => ds4_0.Tup10_sel5_unsigned_5
, Tup10_sel6_unsigned_6 => ds4_0.Tup10_sel6_unsigned_6
, Tup10_sel7_unsigned_7 => ds4_0.Tup10_sel7_unsigned_7
, Tup10_sel8_unsigned_8 => ds4_0.Tup10_sel8_unsigned_8
, Tup10_sel9_unsigned_9 => ds4_0.Tup10_sel9_unsigned_9 ) );
opcode_0 <= \c$ds_app_arg_2\.Tup3_sel0_unsigned;
ds4_selection_res_0 <= ((opcode_0 = to_unsigned(0,1)) and (result_8 or result_8)) or ((opcode_0 = to_unsigned(1,1)) and result_8);
ds4_0 <= \c$ds_app_arg_2\.Tup3_sel1_Tup10_0 when ds4_selection_res_0 else
\c$ds_app_arg_2\.Tup3_sel2_Tup10_1;
-- register begin
cds_app_arg_3_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg_3\ <= Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
elsif rising_edge(clk) then
if en then
\c$ds_app_arg_3\ <= result_9.Tup2_sel0_array_of_signed_2;
end if;
end if;
end process;
-- register end
result_8 <= result_9.Tup2_sel1_boolean;
\c$case_alt_selection_res_9\ <= (to_unsigned(0,5) <= tt2_1) and (to_unsigned(0,5) >= tt1_1);
\c$case_alt_9\ <= to_signed(1,2) when \c$case_alt_selection_res_9\ else
\c$case_alt_10\;
\c$case_alt_selection_res_10\ <= (to_unsigned(0,5) <= ff2_1) and (to_unsigned(0,5) >= ff1_1);
\c$case_alt_10\ <= to_signed(-1,2) when \c$case_alt_selection_res_10\ else
\c$case_alt_11\;
\c$case_alt_selection_res_11\ <= (to_unsigned(0,5) <= mm2_1) and (to_unsigned(0,5) >= mm1_1);
\c$case_alt_11\ <= to_signed(0,2) when \c$case_alt_selection_res_11\ else
\c$case_alt_12\;
\c$case_alt_selection_res_12\ <= (to_unsigned(0,5) <= tm2_1) and ((to_unsigned(0,5) >= tm1_1) and \c$app_arg_3\);
\c$case_alt_12\ <= to_signed(1,2) when \c$case_alt_selection_res_12\ else
\c$case_alt_13\;
\c$case_alt_selection_res_13\ <= (to_unsigned(0,5) <= fm2_1) and ((to_unsigned(0,5) >= fm1_1) and \c$app_arg_3\);
\c$vec_3\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg_3\)));
\c$case_alt_sel_alt_33\ <= (\c$vec_3\(0 to 1-1),\c$vec_3\(1 to \c$vec_3\'high));
\c$case_alt_13\ <= to_signed(-1,2) when \c$case_alt_selection_res_13\ else
\c$case_alt_sel_alt_33\.Tup2_2_sel0_array_of_signed_2_0(0);
fm1_1 <= result_10.Tup10_sel8_unsigned_8;
fm2_1 <= result_10.Tup10_sel9_unsigned_9;
\c$vec_4\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg_3\)));
\c$app_arg_3_5\ <= (\c$vec_4\(0 to 1-1),\c$vec_4\(1 to \c$vec_4\'high));
\c$app_arg_3\ <= \c$app_arg_3_5\.Tup2_2_sel0_array_of_signed_2_0(0) = to_signed(0,2);
tm1_1 <= result_10.Tup10_sel6_unsigned_6;
tm2_1 <= result_10.Tup10_sel7_unsigned_7;
mm1_1 <= result_10.Tup10_sel4_unsigned_4;
mm2_1 <= result_10.Tup10_sel5_unsigned_5;
ff1_1 <= result_10.Tup10_sel2_unsigned_2;
ff2_1 <= result_10.Tup10_sel3_unsigned_3;
tt1_1 <= result_10.Tup10_sel0_unsigned_0;
tt2_1 <= result_10.Tup10_sel1_unsigned_1;
-- index begin
indexVec_1 : block
signal vec_index_1 : integer range 0 to 1-1;
begin
vec_index_1 <= to_integer(to_signed(0,64))
-- pragma translate_off
mod 1
-- pragma translate_on
;
\c$app_arg_4\ <= \c$ds_app_arg_3\(vec_index_1);
end block;
-- index end
result_9 <= ( Tup2_sel0_array_of_signed_2 => Prop3_topEntity_types.array_of_signed_2'(0 => \c$case_alt_9\)
, Tup2_sel1_boolean => \c$app_arg_4\ = to_signed(1,2) );
-- register begin
cds_app_arg_4_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg_4\ <= ( Tup3_sel0_unsigned => to_unsigned(0,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(0,5)
, Tup10_sel1_unsigned_1 => to_unsigned(0,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(0,5)
, Tup10_sel3_unsigned_3 => to_unsigned(0,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
elsif rising_edge(clk) then
if en then
\c$ds_app_arg_4\ <= result_11.Tup2_0_sel0_Tup3;
end if;
end if;
end process;
-- register end
result_10 <= result_11.Tup2_0_sel1_Tup10;
result_11 <= ( Tup2_0_sel0_Tup3 => \c$ds_app_arg_4\
, Tup2_0_sel1_Tup10 => ( Tup10_sel0_unsigned_0 => ds4_1.Tup10_sel0_unsigned_0
, Tup10_sel1_unsigned_1 => ds4_1.Tup10_sel1_unsigned_1
, Tup10_sel2_unsigned_2 => ds4_1.Tup10_sel2_unsigned_2
, Tup10_sel3_unsigned_3 => ds4_1.Tup10_sel3_unsigned_3
, Tup10_sel4_unsigned_4 => ds4_1.Tup10_sel4_unsigned_4
, Tup10_sel5_unsigned_5 => ds4_1.Tup10_sel5_unsigned_5
, Tup10_sel6_unsigned_6 => ds4_1.Tup10_sel6_unsigned_6
, Tup10_sel7_unsigned_7 => ds4_1.Tup10_sel7_unsigned_7
, Tup10_sel8_unsigned_8 => ds4_1.Tup10_sel8_unsigned_8
, Tup10_sel9_unsigned_9 => ds4_1.Tup10_sel9_unsigned_9 ) );
opcode_1 <= \c$ds_app_arg_4\.Tup3_sel0_unsigned;
input1 <= eta1.Tup2_1_sel0_boolean_0;
input2 <= eta1.Tup2_1_sel1_boolean_1;
ds4_selection_res_1 <= ((opcode_1 = to_unsigned(0,1)) and (input1 or input2)) or ((opcode_1 = to_unsigned(1,1)) and input1);
ds4_1 <= \c$ds_app_arg_4\.Tup3_sel1_Tup10_0 when ds4_selection_res_1 else
\c$ds_app_arg_4\.Tup3_sel2_Tup10_1;
-- register begin
cds_app_arg_5_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg_5\ <= Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2));
elsif rising_edge(clk) then
if en then
\c$ds_app_arg_5\ <= result_13.Tup2_sel0_array_of_signed_2;
end if;
end if;
end process;
-- register end
result_12 <= result_13.Tup2_sel1_boolean;
\c$case_alt_selection_res_14\ <= (to_unsigned(0,5) <= tt2_2) and (to_unsigned(0,5) >= tt1_2);
\c$case_alt_14\ <= to_signed(1,2) when \c$case_alt_selection_res_14\ else
\c$case_alt_15\;
\c$case_alt_selection_res_15\ <= (to_unsigned(0,5) <= ff2_2) and (to_unsigned(0,5) >= ff1_2);
\c$case_alt_15\ <= to_signed(-1,2) when \c$case_alt_selection_res_15\ else
\c$case_alt_16\;
\c$case_alt_selection_res_16\ <= (to_unsigned(0,5) <= mm2_2) and (to_unsigned(0,5) >= mm1_2);
\c$case_alt_16\ <= to_signed(0,2) when \c$case_alt_selection_res_16\ else
\c$case_alt_17\;
\c$case_alt_selection_res_17\ <= (to_unsigned(0,5) <= tm2_2) and ((to_unsigned(0,5) >= tm1_2) and \c$app_arg_5\);
\c$case_alt_17\ <= to_signed(1,2) when \c$case_alt_selection_res_17\ else
\c$case_alt_18\;
\c$case_alt_selection_res_18\ <= (to_unsigned(0,5) <= fm2_2) and ((to_unsigned(0,5) >= fm1_2) and \c$app_arg_5\);
\c$vec_5\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg_5\)));
\c$case_alt_sel_alt_45\ <= (\c$vec_5\(0 to 1-1),\c$vec_5\(1 to \c$vec_5\'high));
\c$case_alt_18\ <= to_signed(-1,2) when \c$case_alt_selection_res_18\ else
\c$case_alt_sel_alt_45\.Tup2_2_sel0_array_of_signed_2_0(0);
fm1_2 <= result_14.Tup10_sel8_unsigned_8;
fm2_2 <= result_14.Tup10_sel9_unsigned_9;
\c$vec_6\ <= (Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(Prop3_topEntity_types.array_of_signed_2'(0 => to_signed(0,2))) & Prop3_topEntity_types.array_of_signed_2'(\c$ds_app_arg_5\)));
\c$app_arg_5_8\ <= (\c$vec_6\(0 to 1-1),\c$vec_6\(1 to \c$vec_6\'high));
\c$app_arg_5\ <= \c$app_arg_5_8\.Tup2_2_sel0_array_of_signed_2_0(0) = to_signed(0,2);
tm1_2 <= result_14.Tup10_sel6_unsigned_6;
tm2_2 <= result_14.Tup10_sel7_unsigned_7;
mm1_2 <= result_14.Tup10_sel4_unsigned_4;
mm2_2 <= result_14.Tup10_sel5_unsigned_5;
ff1_2 <= result_14.Tup10_sel2_unsigned_2;
ff2_2 <= result_14.Tup10_sel3_unsigned_3;
tt1_2 <= result_14.Tup10_sel0_unsigned_0;
tt2_2 <= result_14.Tup10_sel1_unsigned_1;
-- index begin
indexVec_2 : block
signal vec_index_2 : integer range 0 to 1-1;
begin
vec_index_2 <= to_integer(to_signed(0,64))
-- pragma translate_off
mod 1
-- pragma translate_on
;
\c$app_arg_6\ <= \c$ds_app_arg_5\(vec_index_2);
end block;
-- index end
result_13 <= ( Tup2_sel0_array_of_signed_2 => Prop3_topEntity_types.array_of_signed_2'(0 => \c$case_alt_14\)
, Tup2_sel1_boolean => \c$app_arg_6\ = to_signed(1,2) );
-- register begin
cds_app_arg_6_register : process(clk,rst)
begin
if rst = '1' then
\c$ds_app_arg_6\ <= ( Tup3_sel0_unsigned => to_unsigned(1,1)
, Tup3_sel1_Tup10_0 => ( Tup10_sel0_unsigned_0 => to_unsigned(31,5)
, Tup10_sel1_unsigned_1 => to_unsigned(31,5)
, Tup10_sel2_unsigned_2 => to_unsigned(0,5)
, Tup10_sel3_unsigned_3 => to_unsigned(0,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) )
, Tup3_sel2_Tup10_1 => ( Tup10_sel0_unsigned_0 => to_unsigned(0,5)
, Tup10_sel1_unsigned_1 => to_unsigned(0,5)
, Tup10_sel2_unsigned_2 => to_unsigned(31,5)
, Tup10_sel3_unsigned_3 => to_unsigned(31,5)
, Tup10_sel4_unsigned_4 => to_unsigned(31,5)
, Tup10_sel5_unsigned_5 => to_unsigned(31,5)
, Tup10_sel6_unsigned_6 => to_unsigned(31,5)
, Tup10_sel7_unsigned_7 => to_unsigned(31,5)
, Tup10_sel8_unsigned_8 => to_unsigned(31,5)
, Tup10_sel9_unsigned_9 => to_unsigned(31,5) ) );
elsif rising_edge(clk) then
if en then
\c$ds_app_arg_6\ <= result_15.Tup2_0_sel0_Tup3;
end if;
end if;
end process;
-- register end
result_14 <= result_15.Tup2_0_sel1_Tup10;
result_15 <= ( Tup2_0_sel0_Tup3 => \c$ds_app_arg_6\
, Tup2_0_sel1_Tup10 => ( Tup10_sel0_unsigned_0 => ds4_2.Tup10_sel0_unsigned_0
, Tup10_sel1_unsigned_1 => ds4_2.Tup10_sel1_unsigned_1
, Tup10_sel2_unsigned_2 => ds4_2.Tup10_sel2_unsigned_2
, Tup10_sel3_unsigned_3 => ds4_2.Tup10_sel3_unsigned_3
, Tup10_sel4_unsigned_4 => ds4_2.Tup10_sel4_unsigned_4
, Tup10_sel5_unsigned_5 => ds4_2.Tup10_sel5_unsigned_5
, Tup10_sel6_unsigned_6 => ds4_2.Tup10_sel6_unsigned_6
, Tup10_sel7_unsigned_7 => ds4_2.Tup10_sel7_unsigned_7
, Tup10_sel8_unsigned_8 => ds4_2.Tup10_sel8_unsigned_8
, Tup10_sel9_unsigned_9 => ds4_2.Tup10_sel9_unsigned_9 ) );
opcode_2 <= \c$ds_app_arg_6\.Tup3_sel0_unsigned;
ds4_selection_res_2 <= ((opcode_2 = to_unsigned(0,1)) and (inp1 or inp1)) or ((opcode_2 = to_unsigned(1,1)) and inp1);
ds4_2 <= \c$ds_app_arg_6\.Tup3_sel1_Tup10_0 when ds4_selection_res_2 else
\c$ds_app_arg_6\.Tup3_sel2_Tup10_1;
inp1 <= eta1.Tup2_1_sel0_boolean_0;
end;