34 lines
2.0 KiB
Haskell
34 lines
2.0 KiB
Haskell
module Prop_combined where
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import Clash.Explicit.Testbench
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import Clash.Prelude
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import Prop1(prop1)
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import Prop2(prop2)
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import Prop3(prop3)
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import Prop4(prop4)
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import Prop5(prop5)
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finalprop (drain,dry,start,wash,fill,soak) = bundle (prop1 (drain,dry) , prop2 (start, wash), prop3 (fill, soak), prop4 (start,soak), prop5 (start, dry) )
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topEntity
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:: Clock System
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-> Reset System
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-> Enable System
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-> (Signal System (Bool), Signal System (Bool), Signal System (Bool), Signal System (Bool),Signal System (Bool),Signal System (Bool))
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-> (Signal System (Bool,Bool,Bool,Bool,Bool))
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topEntity = exposeClockResetEnable finalprop
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testBench :: Signal System Bool
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testBench = done
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where
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testInput1 = stimuliGenerator clk rst $(listToVecTH [False::Bool , False, True, False, False, True, False, False, True, True, True, True, False])
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testInput2 = stimuliGenerator clk rst $(listToVecTH [True::Bool , True, True, True, True, True, False, False, True, True, True, True, False])
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testInput3 = stimuliGenerator clk rst $(listToVecTH [False::Bool , False, True, False, False, True, False, False, True, True, True, True, False])
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testInput4 = stimuliGenerator clk rst $(listToVecTH [False::Bool , False, True, False, False, True, False, False, True, True, True, True, False])
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testInput5 = stimuliGenerator clk rst $(listToVecTH [False::Bool , False, True, False, False, True, False, False, True, True, True, True, False])
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testInput6 = stimuliGenerator clk rst $(listToVecTH [False::Bool , False, True, False, False, True, False, False, True, True, True, True, False])
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expectOutput = outputVerifier' clk rst $(listToVecTH [(False,False, True , True, False) ::(Bool,Bool,Bool,Bool,Bool), (True, True, False, True, True), (False, False, False, False, True)])
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done = expectOutput (topEntity clk rst en (testInput1, testInput2,testInput3,testInput4,testInput5,testInput6))
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en = enableGen
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clk = tbSystemClockGen (not <$> done)
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rst = systemResetGen
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