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implemented discrete event simulation in execute stage

This commit is contained in:
karthikmurakonda 2022-10-21 02:21:45 +05:30
parent 42f0925c13
commit e8e0b9ab4a
6 changed files with 203 additions and 154 deletions
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6
assignment-5/bin/hello.txt
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@ -1,4 +1,4 @@
Number of instructions executed = 7609
Number of cycles taken = 11172
Number of instructions executed = 29
Number of cycles taken = 1169
Number of data hazards = 0
Number of control hazards = 176
Number of control hazards = 10

6
assignment-5/src/hello.txt
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@ -1,4 +1,4 @@
Number of instructions executed = 926
Number of cycles taken = 1169
Number of instructions executed = 277
Number of cycles taken = 11172
Number of data hazards = 0
Number of control hazards = 10
Number of control hazards = 176

321
assignment-5/src/processor/pipeline/Execute.java
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@ -1,12 +1,16 @@
package processor.pipeline;
import processor.Processor;
import configuration.Configuration;
import generic.Element;
import generic.Event;
import generic.ExecutionCompleteEvent;
import generic.Instruction;
import generic.Simulator;
import generic.Statistics;
import generic.Instruction.OperationType;
import generic.Operand.OperandType;
public class Execute {
public class Execute implements Element{
Processor containingProcessor;
OF_EX_LatchType OF_EX_Latch;
EX_MA_LatchType EX_MA_Latch;
@ -24,161 +28,186 @@ public class Execute {
{
// storing x31 here itself to not to complicate.
// TODO:remove this later in pipeline
if(OF_EX_Latch.isEX_enable())
if(OF_EX_Latch.isEX_enable()&& !OF_EX_Latch.isEX_busy())
{
int op1 = OF_EX_Latch.getOp1();
int op2 = OF_EX_Latch.getOp2();
int imm = OF_EX_Latch.getImm();
System.out.println("op1: "+op1+" op2: "+op2+" imm: "+imm);
Instruction instruction = OF_EX_Latch.getInstruction();
int cur_pc = containingProcessor.getRegisterFile().getProgramCounter();
int alu_result = 0;
System.out.println("EX: " + instruction);
OperationType alu_op = OF_EX_Latch.getInstruction().getOperationType();
System.out.println("ALU OP: " + alu_op);
boolean noma = false;
Statistics.setNumberOfInstructions(Statistics.getNumberOfInstructions() + 1);
switch(alu_op)
{
case add: alu_result = op1 + op2; break;
case addi: alu_result = op1 + imm; break;
case sub: alu_result = op1 - op2; break;
case subi: alu_result = op1 - imm; break;
case mul: alu_result = op1 * op2; break;
case muli: alu_result = op1 * imm; break;
case div:
alu_result = op1 / op2;
containingProcessor.getRegisterFile().setValue(31, op1 % op2);
break;
case divi:
alu_result = op1 / imm;
containingProcessor.getRegisterFile().setValue(31, op1 % imm);
break;
case and: alu_result = op1 & op2; break;
case andi: alu_result = op1 & imm; break;
case or: alu_result = op1 | op2; break;
case ori: alu_result = op1 | imm; break;
case xor: alu_result = op1 ^ op2; break;
case xori: alu_result = op1 ^ imm; break;
case slt: alu_result= (op1 < op2) ? 1 : 0; break;
case slti: alu_result= (op1 < imm) ? 1 : 0; break;
case sll:
containingProcessor.getRegisterFile().setValue(31, (int) Math.pow(2, op2));
alu_result = op1 << op2;
break;
case slli:
containingProcessor.getRegisterFile().setValue(31, (int) Math.pow(2, imm));
alu_result = op1 << imm;
break;
case srl:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (op2 - 1)));
alu_result = op1 >>> op2;
break;
case srli:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (imm - 1)));
alu_result = op1 >>> imm;
break;
case sra:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (op2 - 1)));
alu_result = op1 >> op2;
break;
case srai:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (imm - 1)));
alu_result = op1 >> imm;
break;
case load: alu_result = op1 + imm; break;
case store: alu_result = op2 + imm; break;
case jmp:
OperationType alu_op = OF_EX_Latch.getInstruction().getOperationType();
long latency = 0;
switch (alu_op) {
case mul:
case muli:
latency = Configuration.multiplier_latency;
break;
case div:
case divi:
latency = Configuration.divider_latency;
break;
default:
latency = Configuration.ALU_latency;
break;
}
Simulator.getEventQueue().addEvent(new ExecutionCompleteEvent(latency, this, this));
OF_EX_Latch.setEX_busy(true);
EX_MA_Latch.setMA_enable(false);
}
}
@Override
public void handleEvent(Event e) {
int op1 = OF_EX_Latch.getOp1();
int op2 = OF_EX_Latch.getOp2();
int imm = OF_EX_Latch.getImm();
System.out.println("op1: "+op1+" op2: "+op2+" imm: "+imm);
Instruction instruction = OF_EX_Latch.getInstruction();
int cur_pc = containingProcessor.getRegisterFile().getProgramCounter();
int alu_result = 0;
System.out.println("EX: " + instruction);
OperationType alu_op = OF_EX_Latch.getInstruction().getOperationType();
System.out.println("ALU OP: " + alu_op);
boolean noma = false;
Statistics.setNumberOfInstructions(Statistics.getNumberOfInstructions() + 1);
switch(alu_op)
{
case add: alu_result = op1 + op2; break;
case addi: alu_result = op1 + imm; break;
case sub: alu_result = op1 - op2; break;
case subi: alu_result = op1 - imm; break;
case mul: alu_result = op1 * op2; break;
case muli: alu_result = op1 * imm; break;
case div:
alu_result = op1 / op2;
containingProcessor.getRegisterFile().setValue(31, op1 % op2);
break;
case divi:
alu_result = op1 / imm;
containingProcessor.getRegisterFile().setValue(31, op1 % imm);
break;
case and: alu_result = op1 & op2; break;
case andi: alu_result = op1 & imm; break;
case or: alu_result = op1 | op2; break;
case ori: alu_result = op1 | imm; break;
case xor: alu_result = op1 ^ op2; break;
case xori: alu_result = op1 ^ imm; break;
case slt: alu_result= (op1 < op2) ? 1 : 0; break;
case slti: alu_result= (op1 < imm) ? 1 : 0; break;
case sll:
containingProcessor.getRegisterFile().setValue(31, (int) Math.pow(2, op2));
alu_result = op1 << op2;
break;
case slli:
containingProcessor.getRegisterFile().setValue(31, (int) Math.pow(2, imm));
alu_result = op1 << imm;
break;
case srl:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (op2 - 1)));
alu_result = op1 >>> op2;
break;
case srli:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (imm - 1)));
alu_result = op1 >>> imm;
break;
case sra:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (op2 - 1)));
alu_result = op1 >> op2;
break;
case srai:
containingProcessor.getRegisterFile().setValue(31, op1 & (1 << (imm - 1)));
alu_result = op1 >> imm;
break;
case load: alu_result = op1 + imm; break;
case store: alu_result = op2 + imm; break;
case jmp:
{
OperandType optype = instruction.getSourceOperand1().getOperandType();
if (optype == OperandType.Register){
imm = containingProcessor.getRegisterFile().getValue(
instruction.getSourceOperand1().getValue());
}
else{
imm = OF_EX_Latch.getImm();
}
alu_result = cur_pc + imm ;
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
}
break;
case beq:
{
if(op1 == op2)
{
OperandType optype = instruction.getSourceOperand1().getOperandType();
if (optype == OperandType.Register){
imm = containingProcessor.getRegisterFile().getValue(
instruction.getSourceOperand1().getValue());
}
else{
imm = OF_EX_Latch.getImm();
}
alu_result = cur_pc + imm ;
EX_IF_Latch.setIF_enable(true);
alu_result = cur_pc + imm;
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
}
break;
case beq:
{
if(op1 == op2)
{
EX_IF_Latch.setIF_enable(true);
alu_result = cur_pc + imm;
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
}
}
break;
case bne:
{
if(op1 != op2)
{
alu_result = cur_pc + imm;
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
}
}
break;
case blt:
{
if(op1 < op2)
{
alu_result = cur_pc + imm;
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
// System.out.println("hello world");
}
// System.out.println("hello world2");
}
break;
case bgt:
{
if(op1 > op2)
{
alu_result = cur_pc + imm;
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
}
}
break;
case end:
{
// containingProcessor.getRegisterFile().setProgramCounter(containingProcessor.getRegisterFile().getProgramCounter()-1);
containingProcessor.getOFUnit().setisEnd(true);
break;
}
default:
break;
}
System.out.println("ALU RESULT: " + alu_result+"\n\n");
EX_MA_Latch.setALUResult(alu_result);
EX_MA_Latch.setInstruction(OF_EX_Latch.getInstruction());
if(!noma)
break;
case bne:
{
EX_MA_Latch.setMA_enable(true);
}else{
Statistics.setControlhazards(Statistics.getControlhazards()+2); // stall 2 cycles
if(op1 != op2)
{
alu_result = cur_pc + imm;
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
}
}
break;
case blt:
{
if(op1 < op2)
{
alu_result = cur_pc + imm;
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
// System.out.println("hello world");
}
// System.out.println("hello world2");
}
break;
case bgt:
{
if(op1 > op2)
{
alu_result = cur_pc + imm;
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
}
}
break;
case end:
{
// containingProcessor.getRegisterFile().setProgramCounter(containingProcessor.getRegisterFile().getProgramCounter()-1);
containingProcessor.getOFUnit().setisEnd(true);
break;
}
default:
break;
}
System.out.println("ALU RESULT: " + alu_result+"\n\n");
EX_MA_Latch.setALUResult(alu_result);
EX_MA_Latch.setInstruction(OF_EX_Latch.getInstruction());
if(!noma)
{
EX_MA_Latch.setMA_enable(true);
}else{
Statistics.setControlhazards(Statistics.getControlhazards()+2); // stall 2 cycles
}
OF_EX_Latch.setEX_busy(false);
}
}

10
assignment-5/src/processor/pipeline/MemoryAccess.java
View File

@ -1,10 +1,12 @@
package processor.pipeline;
import generic.Element;
import generic.Event;
import generic.Instruction;
import processor.Processor;
import generic.Instruction.OperationType;
public class MemoryAccess {
public class MemoryAccess implements Element {
Processor containingProcessor;
EX_MA_LatchType EX_MA_Latch;
MA_RW_LatchType MA_RW_Latch;
@ -41,4 +43,10 @@ public class MemoryAccess {
}
}
@Override
public void handleEvent(Event e) {
// TODO Auto-generated method stub
}
}

8
assignment-5/src/processor/pipeline/OF_EX_LatchType.java
View File

@ -7,6 +7,7 @@ public class OF_EX_LatchType {
boolean EX_enable;
Instruction instruction;
int op1, op2, imm;
boolean EX_busy=false;
public OF_EX_LatchType()
{
@ -53,5 +54,12 @@ public class OF_EX_LatchType {
EX_enable = eX_enable;
}
public boolean isEX_busy() {
return EX_busy;
}
public void setEX_busy(boolean isEX_busy) {
this.EX_busy = isEX_busy;
}
}

6
assignment-5/src/processor/pipeline/OperandFetch.java
View File

@ -195,10 +195,14 @@ public class OperandFetch {
System.out.println("\n\nData Hazard - Interlock\n\n");
Statistics.setDatahazards(Statistics.getDatahazards() + 1);
}
OF_EX_Latch.setEX_enable(true);
}
else if (!Proceed) {
// Proceed = true;
System.out.println("\n\nControl Hazard - Interlock\n\n");
OF_EX_Latch.setEX_enable(false);
// System.out.println("\n\nControl Hazard - Interlock\n\n");
}else{
OF_EX_Latch.setEX_enable(false);
}
updateQueue(addtoqueue);
}