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final submission

This commit is contained in:
karthikmurakonda 2022-10-22 00:37:51 +05:30
parent b06e33f8de
commit c25175fceb
7 changed files with 10 additions and 24 deletions
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assignment-5/report.pdf Normal file
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2
assignment-5/src/processor/Processor.java
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@ -48,7 +48,7 @@ public class Processor {
OFUnit = new OperandFetch(this, IF_OF_Latch, OF_EX_Latch, IF_EnableLatch);
EXUnit = new Execute(this, OF_EX_Latch, EX_MA_Latch, EX_IF_Latch);
MAUnit = new MemoryAccess(this, EX_MA_Latch, MA_RW_Latch);
RWUnit = new RegisterWrite(this, MA_RW_Latch, IF_EnableLatch);
RWUnit = new RegisterWrite(this, MA_RW_Latch, IF_EnableLatch, EX_MA_Latch);
}
public void printState(int memoryStartingAddress, int memoryEndingAddress)

6
assignment-5/src/processor/pipeline/Execute.java
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@ -26,8 +26,6 @@ public class Execute implements Element{
public void performEX()
{
// storing x31 here itself to not to complicate.
// TODO:remove this later in pipeline
if(OF_EX_Latch.isEX_enable()&& !OF_EX_Latch.isEX_busy())
{
@ -74,7 +72,6 @@ public class Execute implements Element{
OperationType alu_op = OF_EX_Latch.getInstruction().getOperationType();
System.out.println("ALU OP: " + alu_op);
boolean noma = false;
Statistics.setNumberOfInstructions(Statistics.getNumberOfInstructions() + 1);
switch(alu_op)
{
case add: alu_result = op1 + op2; break;
@ -178,9 +175,7 @@ public class Execute implements Element{
EX_IF_Latch.setPC(alu_result-1);
noma = true;
containingProcessor.getOFUnit().setProceed(false);
// System.out.println("hello world");
}
// System.out.println("hello world2");
}
break;
case bgt:
@ -197,7 +192,6 @@ public class Execute implements Element{
break;
case end:
{
// containingProcessor.getRegisterFile().setProgramCounter(containingProcessor.getRegisterFile().getProgramCounter()-1);
containingProcessor.getOFUnit().setisEnd(true);
break;
}

5
assignment-5/src/processor/pipeline/InstructionFetch.java
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@ -6,6 +6,7 @@ import generic.Event;
import generic.MemoryReadEvent;
import generic.MemoryResponseEvent;
import generic.Simulator;
import generic.Statistics;
import processor.Clock;
import processor.Processor;
@ -54,9 +55,6 @@ public class InstructionFetch implements Element{
return;
}
int currentPC = containingProcessor.getRegisterFile().getProgramCounter();
// int newInstruction = containingProcessor.getMainMemory().getWord(currentPC);
// IF_OF_Latch.setInstruction(newInstruction);
// containingProcessor.getRegisterFile().setProgramCounter(currentPC + 1);
Simulator.getEventQueue().addEvent(
new MemoryReadEvent(
@ -93,6 +91,7 @@ public class InstructionFetch implements Element{
return;
}
MemoryResponseEvent event = (MemoryResponseEvent) e;
Statistics.setNumberOfInstructions(Statistics.getNumberOfInstructions()+1);
IF_OF_Latch.setInstruction(event.getValue());
containingProcessor.getRegisterFile().setProgramCounter(containingProcessor.getRegisterFile().getProgramCounter() + 1);
IF_OF_Latch.setOF_enable(true);

6
assignment-5/src/processor/pipeline/MemoryAccess.java
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@ -39,7 +39,6 @@ public class MemoryAccess implements Element {
{
int val_store = containingProcessor.getRegisterFile().getValue(
instruction.getSourceOperand1().getValue());
// containingProcessor.getMainMemory().setWord(alu_result, val_store);
Simulator.getEventQueue().addEvent(
new MemoryWriteEvent(
Clock.getCurrentTime()+Configuration.mainMemoryLatency,
@ -54,7 +53,6 @@ public class MemoryAccess implements Element {
}
else if (op_type==OperationType.load)
{
// int load_result = containingProcessor.getMainMemory().getWord(alu_result);
Simulator.getEventQueue().addEvent(
new MemoryReadEvent(
Clock.getCurrentTime()+Configuration.mainMemoryLatency,
@ -72,17 +70,13 @@ public class MemoryAccess implements Element {
@Override
public void handleEvent(Event e) {
// TODO Auto-generated method stub
if(e instanceof ExecutionCompleteEvent) {
// MemoryResponseEvent event = (MemoryResponseEvent) e;
// MA_RW_Latch.setLoad_result(event.getValue());
EX_MA_Latch.setMA_busy(false);
MA_RW_Latch.setRW_enable(true);
return;
}
MemoryResponseEvent event=(MemoryResponseEvent) e;
MA_RW_Latch.setLoad_result(event.getValue());
EX_MA_Latch.setMA_busy(false);
MA_RW_Latch.setRW_enable(true);
}

10
assignment-5/src/processor/pipeline/OperandFetch.java
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@ -33,7 +33,8 @@ public class OperandFetch {
queue.add(-1);
queue.add(-1);
queue.add(-1);
// queue.add(-1);
queue.add(-1);
queue.add(-1);
}
boolean checkdatahazard(int[] operands) {
@ -200,21 +201,16 @@ public class OperandFetch {
OF_EX_Latch.setEX_enable(noDataHazard);
if(!noDataHazard){
IF_EnableLatch.setFreeze(true);
System.out.println("\n\nData Hazard - Interlock\n\n");
Statistics.setDatahazards(Statistics.getDatahazards() + 1);
}
// OF_EX_Latch.setEX_enable(true);
updateQueue(addtoqueue);
}
else if (!Proceed) {
// Proceed = true;
// updateQueue(addtoqueue);
OF_EX_Latch.setEX_enable(false);
// System.out.println("\n\nControl Hazard - Interlock\n\n");
}else{
OF_EX_Latch.setEX_enable(false);
}
// updateQueue(addtoqueue);
}
public void setisEnd(boolean isEnd) {

5
assignment-5/src/processor/pipeline/RegisterWrite.java
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@ -9,12 +9,14 @@ public class RegisterWrite {
Processor containingProcessor;
MA_RW_LatchType MA_RW_Latch;
IF_EnableLatchType IF_EnableLatch;
EX_MA_LatchType EX_MA_Latch;
public RegisterWrite(Processor containingProcessor, MA_RW_LatchType mA_RW_Latch, IF_EnableLatchType iF_EnableLatch)
public RegisterWrite(Processor containingProcessor, MA_RW_LatchType mA_RW_Latch, IF_EnableLatchType iF_EnableLatch, EX_MA_LatchType eX_MA_Latch)
{
this.containingProcessor = containingProcessor;
this.MA_RW_Latch = mA_RW_Latch;
this.IF_EnableLatch = iF_EnableLatch;
this.EX_MA_Latch = eX_MA_Latch;
}
public void performRW()
@ -27,6 +29,7 @@ public class RegisterWrite {
boolean proceed = true;
if (op_type==OperationType.load)
{
EX_MA_Latch.setMA_busy(false);
int load_result = MA_RW_Latch.getLoad_result();
int rd = instruction.getDestinationOperand().getValue();
containingProcessor.getRegisterFile().setValue(rd, load_result);