diff --git a/.vscode/launch.json b/.vscode/launch.json
index c451a70..6d9e0fa 100644
--- a/.vscode/launch.json
+++ b/.vscode/launch.json
@@ -8,7 +8,8 @@
"type": "java",
"name": "Launch Current File",
"request": "launch",
- "mainClass": "${file}"
+ "mainClass": "${file}",
+ "args": ["assignment-4/src/configuration/config.xml", "assignment-4/src/hello.txt", "assignment-4/supporting_files/test_cases/evenorodd.out"]
},
{
"type": "java",
diff --git a/assignment-4/bin/build.xml b/assignment-4/bin/build.xml
new file mode 100644
index 0000000..4fb8881
--- /dev/null
+++ b/assignment-4/bin/build.xml
@@ -0,0 +1,39 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/assignment-4/bin/configuration/config.xml b/assignment-4/bin/configuration/config.xml
new file mode 100644
index 0000000..002c97c
--- /dev/null
+++ b/assignment-4/bin/configuration/config.xml
@@ -0,0 +1,43 @@
+
+
+
+
+ 2
+ 1
+ 1
+
+
+ 1
+ 4
+ 1
+
+
+ 1
+ 10
+ 1
+
+
+
+
+ 256
+ 2
+ 4
+ LRU
+
+
+
+ 256
+ 2
+ 4
+ LRU
+
+
+
+ 2048
+ 10
+ 4
+ LRU
+
+
+ 40
+
\ No newline at end of file
diff --git a/assignment-4/bin/hello.txt b/assignment-4/bin/hello.txt
new file mode 100644
index 0000000..0ae52f1
--- /dev/null
+++ b/assignment-4/bin/hello.txt
@@ -0,0 +1,2 @@
+Number of instructions executed = 10
+Number of cycles taken = 10
diff --git a/assignment-4/build.xml b/assignment-4/build.xml
new file mode 100755
index 0000000..4fb8881
--- /dev/null
+++ b/assignment-4/build.xml
@@ -0,0 +1,39 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/assignment-4/src/hello.txt b/assignment-4/src/hello.txt
new file mode 100644
index 0000000..3cf28b4
--- /dev/null
+++ b/assignment-4/src/hello.txt
@@ -0,0 +1,2 @@
+Number of instructions executed = 11
+Number of cycles taken = 11
diff --git a/assignment-4/src/processor/pipeline/Execute.java b/assignment-4/src/processor/pipeline/Execute.java
index 0bb637b..1edb48c 100644
--- a/assignment-4/src/processor/pipeline/Execute.java
+++ b/assignment-4/src/processor/pipeline/Execute.java
@@ -3,7 +3,6 @@ import processor.Processor;
import generic.Instruction;
import generic.Instruction.OperationType;
-import generic.Simulator;
import generic.Operand.OperandType;
public class Execute {
@@ -109,10 +108,11 @@ public class Execute {
{
if(op1 == op2)
{
- alu_result = cur_pc + imm;
EX_IF_Latch.setIF_enable(true);
+ alu_result = cur_pc + imm;
EX_IF_Latch.setPC(alu_result);
noma = true;
+ containingProcessor.getOFUnit().setProceed(false);
}
}
break;
@@ -136,9 +136,10 @@ public class Execute {
EX_IF_Latch.setIF_enable(true);
EX_IF_Latch.setPC(alu_result);
noma = true;
- System.out.println("hello world");
+ containingProcessor.getOFUnit().setProceed(false);
+ // System.out.println("hello world");
}
- System.out.println("hello world2");
+ // System.out.println("hello world2");
}
break;
case bgt:
@@ -154,7 +155,8 @@ public class Execute {
break;
case end:
{
- Simulator.setSimulationComplete(true);
+
+ break;
}
default:
break;
@@ -169,7 +171,6 @@ public class Execute {
{
EX_MA_Latch.setMA_enable(true);
}
- OF_EX_Latch.setEX_enable(false);
}
}
}
diff --git a/assignment-4/src/processor/pipeline/InstructionFetch.java b/assignment-4/src/processor/pipeline/InstructionFetch.java
index 5bebbd5..0e9f955 100644
--- a/assignment-4/src/processor/pipeline/InstructionFetch.java
+++ b/assignment-4/src/processor/pipeline/InstructionFetch.java
@@ -21,19 +21,18 @@ public class InstructionFetch {
{
if(EX_IF_Latch.isIF_enable()){
containingProcessor.getRegisterFile().setProgramCounter(EX_IF_Latch.getPC()-1);
-
+ EX_IF_Latch.setIF_enable(false);
System.out.println("IF: PC set to " + EX_IF_Latch.getPC());
- }
- if(IF_EnableLatch.isIF_enable()|| EX_IF_Latch.isIF_enable())
+ } // if EX_IF_Latch is enabled, set PC to EX_IF_Latch's PC and wait for next cycle (1 nop)
+ else if(IF_EnableLatch.isIF_enable())
{
int currentPC = containingProcessor.getRegisterFile().getProgramCounter();
int newInstruction = containingProcessor.getMainMemory().getWord(currentPC);
IF_OF_Latch.setInstruction(newInstruction);
containingProcessor.getRegisterFile().setProgramCounter(currentPC + 1);
- IF_EnableLatch.setIF_enable(false);
+ IF_EnableLatch.setIF_enable(true);
IF_OF_Latch.setOF_enable(true);
- EX_IF_Latch.setIF_enable(false);
}
}
diff --git a/assignment-4/src/processor/pipeline/MemoryAccess.java b/assignment-4/src/processor/pipeline/MemoryAccess.java
index 30f4aab..33fa019 100644
--- a/assignment-4/src/processor/pipeline/MemoryAccess.java
+++ b/assignment-4/src/processor/pipeline/MemoryAccess.java
@@ -37,7 +37,6 @@ public class MemoryAccess {
}
MA_RW_Latch.setInstruction(instruction);
MA_RW_Latch.setRW_enable(true);
- EX_MA_Latch.setMA_enable(false);
}
}
diff --git a/assignment-4/src/processor/pipeline/OperandFetch.java b/assignment-4/src/processor/pipeline/OperandFetch.java
index ecef8f6..9c3938e 100644
--- a/assignment-4/src/processor/pipeline/OperandFetch.java
+++ b/assignment-4/src/processor/pipeline/OperandFetch.java
@@ -13,12 +13,14 @@ public class OperandFetch {
IF_OF_LatchType IF_OF_Latch;
OF_EX_LatchType OF_EX_Latch;
static OperationType[] opTypes = OperationType.values();
+ boolean Proceed;
public OperandFetch(Processor containingProcessor, IF_OF_LatchType iF_OF_Latch, OF_EX_LatchType oF_EX_Latch)
{
this.containingProcessor = containingProcessor;
this.IF_OF_Latch = iF_OF_Latch;
this.OF_EX_Latch = oF_EX_Latch;
+ Proceed = true;
}
public static int twoscompliment(String s) {
@@ -38,12 +40,12 @@ public class OperandFetch {
public void performOF()
{
- if(IF_OF_Latch.isOF_enable())
+ if(IF_OF_Latch.isOF_enable() && Proceed)
{
int instruction = IF_OF_Latch.getInstruction();
Instruction instr = new Instruction();
String bin_instr = Integer.toBinaryString(instruction);
- if (bin_instr.length() < 32) { // TODO: check if this is correct
+ if (bin_instr.length() < 32) {
int diff = 32 - bin_instr.length();
String zeros = "";
for (int i = 0; i < diff; i++) {
@@ -91,7 +93,7 @@ public class OperandFetch {
rs1.setValue(Integer.parseInt(bin_instr.substring(5, 10), 2));
rd.setValue(Integer.parseInt(bin_instr.substring(10, 15), 2));
// check 15th bit to see if it is negative
- int imm = Integer.parseInt(bin_instr.substring(15, 32), 2); // TODO: 2's complement
+ int imm = Integer.parseInt(bin_instr.substring(15, 32), 2);
if (bin_instr.charAt(15)=='1'){
imm = -1*twoscompliment(bin_instr.substring(15, 32));
System.out.println(bin_instr);
@@ -118,7 +120,7 @@ public class OperandFetch {
instr.setDestinationOperand(rd);
- int imm = Integer.parseInt(bin_instr.substring(10, 32), 2); // TODO: 2's complement
+ int imm = Integer.parseInt(bin_instr.substring(10, 32), 2);
if (bin_instr.charAt(10)=='1'){
imm = -1*twoscompliment(bin_instr.substring(10, 32));
System.out.println(bin_instr);
@@ -149,9 +151,18 @@ public class OperandFetch {
}
}
- IF_OF_Latch.setOF_enable(false);
OF_EX_Latch.setEX_enable(true);
}
+ else if (!Proceed) {
+ Proceed = true;
+ }
+ }
+
+ public void setProceed(boolean proceed) {
+ Proceed = proceed;
+ if (!Proceed) {
+ OF_EX_Latch.setEX_enable(false);
+ }
}
}
diff --git a/assignment-4/src/processor/pipeline/RegisterWrite.java b/assignment-4/src/processor/pipeline/RegisterWrite.java
index a1bc405..bebdf77 100644
--- a/assignment-4/src/processor/pipeline/RegisterWrite.java
+++ b/assignment-4/src/processor/pipeline/RegisterWrite.java
@@ -44,7 +44,6 @@ public class RegisterWrite {
containingProcessor.getRegisterFile().setValue(rd, alu_result);
}
}
- MA_RW_Latch.setRW_enable(false);
IF_EnableLatch.setIF_enable(true);
}
}