318 lines
7.1 KiB
C
318 lines
7.1 KiB
C
#include <minix/cpufeature.h>
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#include <minix/type.h>
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#include <assert.h>
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#include "kernel/kernel.h"
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#include "arch_proto.h"
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#include <machine/cpu.h>
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#include <arm/armreg.h>
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#include <string.h>
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#include <minix/type.h>
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/* These are set/computed in kernel.lds. */
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extern char _kern_vir_base, _kern_phys_base, _kern_size;
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/* Retrieve the absolute values to something we can use. */
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static phys_bytes kern_vir_start = (phys_bytes) &_kern_vir_base;
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static phys_bytes kern_phys_start = (phys_bytes) &_kern_phys_base;
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static phys_bytes kern_kernlen = (phys_bytes) &_kern_size;
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/* page directory we can use to map things */
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static u32_t pagedir[4096] __aligned(16384);
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void print_memmap(kinfo_t *cbi)
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{
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int m;
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assert(cbi->mmap_size < MAXMEMMAP);
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for(m = 0; m < cbi->mmap_size; m++) {
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phys_bytes addr = cbi->memmap[m].mm_base_addr, endit = cbi->memmap[m].mm_base_addr + cbi->memmap[m].mm_length;
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printf("%08lx-%08lx ",addr, endit);
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}
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printf("\nsize %08lx\n", cbi->mmap_size);
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}
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void cut_memmap(kinfo_t *cbi, phys_bytes start, phys_bytes end)
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{
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int m;
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phys_bytes o;
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if((o=start % ARM_PAGE_SIZE))
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start -= o;
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if((o=end % ARM_PAGE_SIZE))
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end += ARM_PAGE_SIZE - o;
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assert(kernel_may_alloc);
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for(m = 0; m < cbi->mmap_size; m++) {
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phys_bytes substart = start, subend = end;
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phys_bytes memaddr = cbi->memmap[m].mm_base_addr,
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memend = cbi->memmap[m].mm_base_addr + cbi->memmap[m].mm_length;
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/* adjust cut range to be a subset of the free memory */
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if(substart < memaddr) substart = memaddr;
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if(subend > memend) subend = memend;
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if(substart >= subend) continue;
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/* if there is any overlap, forget this one and add
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* 1-2 subranges back
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*/
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cbi->memmap[m].mm_base_addr = cbi->memmap[m].mm_length = 0;
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if(substart > memaddr)
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add_memmap(cbi, memaddr, substart-memaddr);
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if(subend < memend)
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add_memmap(cbi, subend, memend-subend);
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}
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}
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void add_memmap(kinfo_t *cbi, u64_t addr, u64_t len)
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{
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int m;
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#define LIMIT 0xFFFFF000
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/* Truncate available memory at 4GB as the rest of minix
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* currently can't deal with any bigger.
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*/
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if(addr > LIMIT) {
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return;
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}
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if(addr + len > LIMIT) {
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len -= (addr + len - LIMIT);
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}
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assert(cbi->mmap_size < MAXMEMMAP);
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if(len == 0) {
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return;
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}
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addr = roundup(addr, ARM_PAGE_SIZE);
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len = rounddown(len, ARM_PAGE_SIZE);
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assert(kernel_may_alloc);
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for(m = 0; m < MAXMEMMAP; m++) {
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phys_bytes highmark;
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if(cbi->memmap[m].mm_length) {
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continue;
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}
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cbi->memmap[m].mm_base_addr = addr;
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cbi->memmap[m].mm_length = len;
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cbi->memmap[m].type = MULTIBOOT_MEMORY_AVAILABLE;
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if(m >= cbi->mmap_size) {
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cbi->mmap_size = m+1;
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}
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highmark = addr + len;
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if(highmark > cbi->mem_high_phys) {
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cbi->mem_high_phys = highmark;
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}
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return;
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}
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panic("no available memmap slot");
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}
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u32_t *alloc_pagetable(phys_bytes *ph)
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{
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u32_t *ret;
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#define PG_PAGETABLES 24
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static u32_t pagetables[PG_PAGETABLES][256] __aligned(1024);
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static int pt_inuse = 0;
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if(pt_inuse >= PG_PAGETABLES) {
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panic("no more pagetables");
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}
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assert(sizeof(pagetables[pt_inuse]) == 1024);
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ret = pagetables[pt_inuse++];
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*ph = vir2phys(ret);
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return ret;
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}
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#define PAGE_KB (ARM_PAGE_SIZE / 1024)
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phys_bytes pg_alloc_page(kinfo_t *cbi)
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{
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int m;
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multiboot_memory_map_t *mmap;
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assert(kernel_may_alloc);
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for(m = 0; m < cbi->mmap_size; m++) {
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mmap = &cbi->memmap[m];
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if(!mmap->mm_length) {
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continue;
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}
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assert(mmap->mm_length > 0);
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assert(!(mmap->mm_length % ARM_PAGE_SIZE));
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assert(!(mmap->mm_base_addr % ARM_PAGE_SIZE));
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u32_t addr = mmap->mm_base_addr;
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mmap->mm_base_addr += ARM_PAGE_SIZE;
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mmap->mm_length -= ARM_PAGE_SIZE;
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cbi->kernel_allocated_bytes_dynamic += ARM_PAGE_SIZE;
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return addr;
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}
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panic("can't find free memory");
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}
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void pg_identity(kinfo_t *cbi)
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{
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int i;
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phys_bytes phys;
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/* We map memory that does not correspond to physical memory
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* as non-cacheable. Make sure we know what it is.
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*/
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assert(cbi->mem_high_phys);
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/* Set up an identity mapping page directory */
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for(i = 0; i < ARM_VM_DIR_ENTRIES; i++) {
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u32_t flags = ARM_VM_SECTION
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| ARM_VM_SECTION_USER
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| ARM_VM_SECTION_DOMAIN;
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phys = i * ARM_SECTION_SIZE;
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/* mark mormal memory as cacheable. TODO: fix hard coded values */
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if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END) {
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pagedir[i] = phys | flags | ARM_VM_SECTION_CACHED;
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} else {
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pagedir[i] = phys | flags | ARM_VM_SECTION_DEVICE;
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}
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}
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}
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int pg_mapkernel(void)
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{
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int pde;
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u32_t mapped = 0, kern_phys = kern_phys_start;
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assert(!(kern_vir_start % ARM_SECTION_SIZE));
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assert(!(kern_phys_start % ARM_SECTION_SIZE));
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pde = kern_vir_start / ARM_SECTION_SIZE; /* start pde */
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while(mapped < kern_kernlen) {
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pagedir[pde] = (kern_phys & ARM_VM_SECTION_MASK)
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| ARM_VM_SECTION
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| ARM_VM_SECTION_SUPER
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| ARM_VM_SECTION_DOMAIN
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| ARM_VM_SECTION_CACHED;
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mapped += ARM_SECTION_SIZE;
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kern_phys += ARM_SECTION_SIZE;
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pde++;
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}
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return pde; /* free pde */
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}
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void vm_enable_paging(void)
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{
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u32_t sctlr;
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u32_t actlr;
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write_ttbcr(0);
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/* Set all Domains to Client */
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write_dacr(0x55555555);
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sctlr = read_sctlr();
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/* Enable MMU */
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sctlr |= CPU_CONTROL_MMU_ENABLE;
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/* TRE set to zero (default reset value): TEX[2:0] are used, plus C and B bits.*/
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sctlr &= ~CPU_CONTROL_TR_ENABLE;
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/* AFE set to zero (default reset value): not using simplified model. */
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sctlr &= ~CPU_CONTROL_AF_ENABLE;
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/* Enable instruction ,data cache and branch prediction */
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sctlr |= CPU_CONTROL_DC_ENABLE;
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sctlr |= CPU_CONTROL_IC_ENABLE;
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sctlr |= CPU_CONTROL_BPRD_ENABLE;
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/* Enable barriers */
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sctlr |= CPU_CONTROL_32BD_ENABLE;
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/* Enable L2 cache (cortex-a8) */
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#define CORTEX_A8_L2EN (0x02)
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actlr = read_actlr();
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actlr |= CORTEX_A8_L2EN;
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write_actlr(actlr);
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write_sctlr(sctlr);
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}
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phys_bytes pg_load()
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{
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phys_bytes phpagedir = vir2phys(pagedir);
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write_ttbr0(phpagedir);
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return phpagedir;
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}
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void pg_clear(void)
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{
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memset(pagedir, 0, sizeof(pagedir));
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}
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phys_bytes pg_rounddown(phys_bytes b)
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{
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phys_bytes o;
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if(!(o = b % ARM_PAGE_SIZE)) {
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return b;
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}
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return b - o;
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}
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void pg_map(phys_bytes phys, vir_bytes vaddr, vir_bytes vaddr_end,
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kinfo_t *cbi)
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{
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static int mapped_pde = -1;
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static u32_t *pt = NULL;
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int pde, pte;
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assert(kernel_may_alloc);
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if(phys == PG_ALLOCATEME) {
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assert(!(vaddr % ARM_PAGE_SIZE));
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} else {
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assert((vaddr % ARM_PAGE_SIZE) == (phys % ARM_PAGE_SIZE));
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vaddr = pg_rounddown(vaddr);
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phys = pg_rounddown(phys);
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}
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assert(vaddr < kern_vir_start);
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while(vaddr < vaddr_end) {
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phys_bytes source = phys;
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assert(!(vaddr % ARM_PAGE_SIZE));
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if(phys == PG_ALLOCATEME) {
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source = pg_alloc_page(cbi);
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} else {
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assert(!(phys % ARM_PAGE_SIZE));
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}
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assert(!(source % ARM_PAGE_SIZE));
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pde = ARM_VM_PDE(vaddr);
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pte = ARM_VM_PTE(vaddr);
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if(mapped_pde < pde) {
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phys_bytes ph;
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pt = alloc_pagetable(&ph);
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pagedir[pde] = (ph & ARM_VM_PDE_MASK)
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| ARM_VM_PAGEDIR
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| ARM_VM_PDE_DOMAIN;
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mapped_pde = pde;
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}
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assert(pt);
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pt[pte] = (source & ARM_VM_PTE_MASK)
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| ARM_VM_PAGETABLE
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| ARM_VM_PTE_CACHED
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| ARM_VM_PTE_USER;
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vaddr += ARM_PAGE_SIZE;
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if(phys != PG_ALLOCATEME) {
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phys += ARM_PAGE_SIZE;
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}
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}
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}
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void pg_info(reg_t *pagedir_ph, u32_t **pagedir_v)
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{
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*pagedir_ph = vir2phys(pagedir);
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*pagedir_v = pagedir;
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}
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