641 lines
17 KiB
ArmAsm
641 lines
17 KiB
ArmAsm
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/* This file is part of the lowest layer of the MINIX kernel. (The other part
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* is "proc.c".) The lowest layer does process switching and message handling.
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* Furthermore it contains the assembler startup code for Minix and the 32-bit
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* interrupt handlers. It cooperates with the code in "start.c" to set up a
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* good environment for main().
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*
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* Kernel is entered either because of kernel-calls, ipc-calls, interrupts or
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* exceptions. TSS is set so that the kernel stack is loaded. The user context is
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* saved to the proc table and the handler of the event is called. Once the
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* handler is done, switch_to_user() function is called to pick a new process,
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* finish what needs to be done for the next process to run, sets its context
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* and switch to userspace.
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*
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* For communication with the boot monitor at startup time some constant
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* data are compiled into the beginning of the text segment. This facilitates
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* reading the data at the start of the boot process, since only the first
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* sector of the file needs to be read.
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*
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* Some data storage is also allocated at the end of this file. This data
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* will be at the start of the data segment of the kernel and will be read
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* and modified by the boot monitor before the kernel starts.
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*/
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#include "kernel/kernel.h" /* configures the kernel */
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/* sections */
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#include <machine/vm.h>
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#include "kernel/kernel.h"
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#include <minix/config.h>
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#include <minix/const.h>
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#include <minix/ipcconst.h>
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#include <minix/com.h>
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#include <machine/asm.h>
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#include <machine/interrupt.h>
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#include "archconst.h"
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#include "kernel/const.h"
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#include "kernel/proc.h"
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#include "sconst.h"
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#include <machine/multiboot.h>
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#include "arch_proto.h" /* K_STACK_SIZE */
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#ifdef CONFIG_SMP
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#include "kernel/smp.h"
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#endif
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/* Selected 386 tss offsets. */
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#define TSS3_S_SP0 4
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IMPORT(usermapped_offset)
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IMPORT(copr_not_available_handler)
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IMPORT(params_size)
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IMPORT(params_offset)
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IMPORT(switch_to_user)
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IMPORT(multiboot_init)
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.text
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/*===========================================================================*/
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/* interrupt handlers */
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/* interrupt handlers for 386 32-bit protected mode */
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/*===========================================================================*/
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#define PIC_IRQ_HANDLER(irq) \
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push $irq ;\
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call _C_LABEL(irq_handle) /* intr_handle(irq_handlers[irq]) */ ;\
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add $4, %esp ;
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/*===========================================================================*/
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/* hwint00 - 07 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_master(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0, KTS_INT_HARD) ;\
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push %ebp ;\
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movl $0, %ebp /* for stack trace */ ;\
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call _C_LABEL(context_stop) ;\
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add $4, %esp ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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jmp _C_LABEL(switch_to_user) ;\
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\
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0: \
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pusha ;\
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call _C_LABEL(context_stop_idle) ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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CLEAR_IF(10*4(%esp)) ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_master macro */
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ENTRY(hwint00)
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/* Interrupt routine for irq 0 (the clock). */
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hwint_master(0)
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ENTRY(hwint01)
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/* Interrupt routine for irq 1 (keyboard) */
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hwint_master(1)
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ENTRY(hwint02)
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/* Interrupt routine for irq 2 (cascade!) */
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hwint_master(2)
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ENTRY(hwint03)
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/* Interrupt routine for irq 3 (second serial) */
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hwint_master(3)
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ENTRY(hwint04)
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/* Interrupt routine for irq 4 (first serial) */
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hwint_master(4)
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ENTRY(hwint05)
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/* Interrupt routine for irq 5 (XT winchester) */
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hwint_master(5)
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ENTRY(hwint06)
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/* Interrupt routine for irq 6 (floppy) */
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hwint_master(6)
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ENTRY(hwint07)
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/* Interrupt routine for irq 7 (printer) */
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hwint_master(7)
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/*===========================================================================*/
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/* hwint08 - 15 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_slave(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0, KTS_INT_HARD) ;\
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push %ebp ;\
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movl $0, %ebp /* for stack trace */ ;\
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call _C_LABEL(context_stop) ;\
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add $4, %esp ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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jmp _C_LABEL(switch_to_user) ;\
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\
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0: \
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pusha ;\
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call _C_LABEL(context_stop_idle) ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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CLEAR_IF(10*4(%esp)) ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_slave macro */
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ENTRY(hwint08)
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/* Interrupt routine for irq 8 (realtime clock) */
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hwint_slave(8)
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ENTRY(hwint09)
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/* Interrupt routine for irq 9 (irq 2 redirected) */
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hwint_slave(9)
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ENTRY(hwint10)
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/* Interrupt routine for irq 10 */
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hwint_slave(10)
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ENTRY(hwint11)
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/* Interrupt routine for irq 11 */
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hwint_slave(11)
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ENTRY(hwint12)
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/* Interrupt routine for irq 12 */
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hwint_slave(12)
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ENTRY(hwint13)
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/* Interrupt routine for irq 13 (FPU exception) */
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hwint_slave(13)
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ENTRY(hwint14)
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/* Interrupt routine for irq 14 (AT winchester) */
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hwint_slave(14)
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ENTRY(hwint15)
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/* Interrupt routine for irq 15 */
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hwint_slave(15)
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/* differences with sysenter:
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* - we have to find our own per-cpu stack (i.e. post-SYSCALL
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* %esp is not configured)
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* - we have to save the post-SYSRET %eip, provided by the cpu
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* in %ecx
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* - the system call parameters are passed in %ecx, so we userland
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* code that executes SYSCALL copies %ecx to %edx. So the roles
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* of %ecx and %edx are reversed
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* - we can use %esi as a scratch register
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*/
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#define ipc_entry_syscall_percpu(cpu) ;\
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ENTRY(ipc_entry_syscall_cpu ## cpu) ;\
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xchg %ecx, %edx ;\
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mov k_percpu_stacks+4*cpu, %esi ;\
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mov (%esi), %ebp ;\
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movl $KTS_SYSCALL, P_KERN_TRAP_STYLE(%ebp) ;\
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xchg %esp, %esi ;\
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jmp syscall_sysenter_common
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ipc_entry_syscall_percpu(0)
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ipc_entry_syscall_percpu(1)
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ipc_entry_syscall_percpu(2)
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ipc_entry_syscall_percpu(3)
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ipc_entry_syscall_percpu(4)
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ipc_entry_syscall_percpu(5)
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ipc_entry_syscall_percpu(6)
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ipc_entry_syscall_percpu(7)
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ENTRY(ipc_entry_sysenter)
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/* SYSENTER simply sets kernel segments, EIP to here, and ESP
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* to tss->sp0 (through MSR). so no automatic context saving is done.
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* interrupts are disabled.
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*
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* register usage:
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* edi: call type (IPCVEC, KERVEC)
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* ebx, eax, ecx: syscall params, set by userland
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* esi, edx: esp, eip to restore, set by userland
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*
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* no state is automatically saved; userland does all of that.
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*/
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mov (%esp), %ebp /* get proc saved by arch_finish_switch_to_user */
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/* inform kernel we entered by sysenter and should
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* therefore exit through restore_user_context_sysenter
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*/
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movl $KTS_SYSENTER, P_KERN_TRAP_STYLE(%ebp)
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add usermapped_offset, %edx /* compensate for mapping difference */
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syscall_sysenter_common:
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mov %esi, SPREG(%ebp) /* esi is return esp */
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mov %edx, PCREG(%ebp) /* edx is return eip */
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/* save PSW */
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pushf
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pop %edx
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mov %edx, PSWREG(%ebp)
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/* check for call type; do_ipc? */
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cmp $IPCVEC_UM, %edi
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jz ipc_entry_common
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/* check for kernel trap */
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cmp $KERVEC_UM, %edi
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jz kernel_call_entry_common
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/* unrecognized call number; restore user with error */
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movl $-1, AXREG(%ebp)
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push %ebp
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call restore_user_context /* restore_user_context(%ebp); */
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/*
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* IPC is only from a process to kernel
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*/
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ENTRY(ipc_entry_softint_orig)
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SAVE_PROCESS_CTX(0, KTS_INT_ORIG)
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jmp ipc_entry_common
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ENTRY(ipc_entry_softint_um)
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SAVE_PROCESS_CTX(0, KTS_INT_UM)
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jmp ipc_entry_common
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ENTRY(ipc_entry_common)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %ebx
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push %eax
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push %ecx
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/* stop user process cycles */
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push %ebp
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/* for stack trace */
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movl $0, %ebp
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call _C_LABEL(context_stop)
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add $4, %esp
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call _C_LABEL(do_ipc)
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/* restore the current process pointer and save the return value */
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add $3 * 4, %esp
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pop %esi
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mov %eax, AXREG(%esi)
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jmp _C_LABEL(switch_to_user)
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/*
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* kernel call is only from a process to kernel
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*/
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ENTRY(kernel_call_entry_orig)
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SAVE_PROCESS_CTX(0, KTS_INT_ORIG)
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jmp kernel_call_entry_common
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ENTRY(kernel_call_entry_um)
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SAVE_PROCESS_CTX(0, KTS_INT_UM)
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jmp kernel_call_entry_common
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ENTRY(kernel_call_entry_common)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %eax
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/* stop user process cycles */
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push %ebp
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/* for stack trace */
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movl $0, %ebp
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call _C_LABEL(context_stop)
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add $4, %esp
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call _C_LABEL(kernel_call)
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/* restore the current process pointer and save the return value */
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add $8, %esp
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jmp _C_LABEL(switch_to_user)
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.balign 16
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/*
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* called by the exception interrupt vectors. If the exception does not push
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* errorcode, we assume that the vector handler pushed 0 instead. Next pushed
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* thing is the vector number. From this point on we can continue as if every
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* exception pushes an error code
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*/
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exception_entry:
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/*
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* check if it is a nested trap by comparing the saved code segment
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* descriptor with the kernel CS first
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*/
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TEST_INT_IN_KERNEL(12, exception_entry_nested)
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exception_entry_from_user:
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SAVE_PROCESS_CTX(8, KTS_INT_HARD)
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/* stop user process cycles */
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push %ebp
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/* for stack trace clear %ebp */
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movl $0, %ebp
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call _C_LABEL(context_stop)
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add $4, %esp
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/*
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* push a pointer to the interrupt state pushed by the cpu and the
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* vector number pushed by the vector handler just before calling
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* exception_entry and call the exception handler.
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*/
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push %esp
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push $0 /* it's not a nested exception */
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call _C_LABEL(exception_handler)
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jmp _C_LABEL(switch_to_user)
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exception_entry_nested:
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pusha
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mov %esp, %eax
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add $(8 * 4), %eax
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push %eax
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pushl $1 /* it's a nested exception */
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call _C_LABEL(exception_handler)
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add $8, %esp
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popa
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/* clear the error code and the exception number */
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add $8, %esp
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/* resume execution at the point of exception */
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iret
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ENTRY(restore_user_context_sysenter)
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/* return to userspace using sysexit.
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* most of the context saving the userspace process is
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* responsible for, we just have to take care of the right EIP
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* and ESP restoring here to resume execution, and set EAX and
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* EBX to the saved status values.
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*/
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mov 4(%esp), %ebp /* retrieve proc ptr arg */
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movw $USER_DS_SELECTOR, %ax
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movw %ax, %ds
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mov PCREG(%ebp), %edx /* sysexit restores EIP using EDX */
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mov SPREG(%ebp), %ecx /* sysexit restores ESP using ECX */
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mov AXREG(%ebp), %eax /* trap return value */
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mov BXREG(%ebp), %ebx /* secondary return value */
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movl PSWREG(%ebp), %edi /* load desired PSW to EDI */
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sti /* enable interrupts */
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sysexit /* jump to EIP in user */
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ENTRY(restore_user_context_syscall)
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/* return to userspace using sysret.
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* the procedure is very similar to sysexit; it requires
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* manual %esp restoring, new EIP in ECX, does not require
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* enabling interrupts, and of course sysret instead of sysexit.
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*/
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mov 4(%esp), %ebp /* retrieve proc ptr arg */
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mov PCREG(%ebp), %ecx /* sysret restores EIP using ECX */
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mov SPREG(%ebp), %esp /* restore ESP directly */
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mov AXREG(%ebp), %eax /* trap return value */
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mov BXREG(%ebp), %ebx /* secondary return value */
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movl PSWREG(%ebp), %edi /* load desired PSW to EDI */
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sysret /* jump to EIP in user */
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ENTRY(restore_user_context_int)
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mov 4(%esp), %ebp /* will assume P_STACKBASE == 0 */
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/* reconstruct the stack for iret */
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push $USER_DS_SELECTOR /* ss */
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movl SPREG(%ebp), %eax
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push %eax
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movl PSWREG(%ebp), %eax
|
||
|
push %eax
|
||
|
push $USER_CS_SELECTOR /* cs */
|
||
|
movl PCREG(%ebp), %eax
|
||
|
push %eax
|
||
|
|
||
|
/* Restore segments as the user should see them. */
|
||
|
movw $USER_DS_SELECTOR, %si
|
||
|
movw %si, %ds
|
||
|
movw %si, %es
|
||
|
movw %si, %fs
|
||
|
movw %si, %gs
|
||
|
|
||
|
/* Same for general-purpose registers. */
|
||
|
RESTORE_GP_REGS(%ebp)
|
||
|
|
||
|
movl BPREG(%ebp), %ebp
|
||
|
|
||
|
iret /* continue process */
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* exception handlers */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
#define EXCEPTION_ERR_CODE(vector) \
|
||
|
push $vector ;\
|
||
|
jmp exception_entry
|
||
|
|
||
|
#define EXCEPTION_NO_ERR_CODE(vector) \
|
||
|
pushl $0 ;\
|
||
|
EXCEPTION_ERR_CODE(vector)
|
||
|
|
||
|
LABEL(divide_error)
|
||
|
EXCEPTION_NO_ERR_CODE(DIVIDE_VECTOR)
|
||
|
|
||
|
LABEL(single_step_exception)
|
||
|
EXCEPTION_NO_ERR_CODE(DEBUG_VECTOR)
|
||
|
|
||
|
LABEL(nmi)
|
||
|
#ifndef USE_WATCHDOG
|
||
|
EXCEPTION_NO_ERR_CODE(NMI_VECTOR)
|
||
|
#else
|
||
|
/*
|
||
|
* We have to be very careful as this interrupt can occur anytime. On
|
||
|
* the other hand, if it interrupts a user process, we will resume the
|
||
|
* same process which makes things a little simpler. We know that we are
|
||
|
* already on kernel stack whenever it happened and we can be
|
||
|
* conservative and save everything as we don't need to be extremely
|
||
|
* efficient as the interrupt is infrequent and some overhead is already
|
||
|
* expected.
|
||
|
*/
|
||
|
|
||
|
/*
|
||
|
* save the important registers. We don't save %cs and %ss and they are
|
||
|
* saved and restored by CPU
|
||
|
*/
|
||
|
pushw %ds
|
||
|
pushw %es
|
||
|
pushw %fs
|
||
|
pushw %gs
|
||
|
pusha
|
||
|
|
||
|
/*
|
||
|
* We cannot be sure about the state of the kernel segment register,
|
||
|
* however, we always set %ds and %es to the same as %ss
|
||
|
*/
|
||
|
mov %ss, %si
|
||
|
mov %si, %ds
|
||
|
mov %si, %es
|
||
|
|
||
|
push %esp
|
||
|
call _C_LABEL(nmi_watchdog_handler)
|
||
|
add $4, %esp
|
||
|
|
||
|
/* restore all the important registers as they were before the trap */
|
||
|
popa
|
||
|
popw %gs
|
||
|
popw %fs
|
||
|
popw %es
|
||
|
popw %ds
|
||
|
|
||
|
iret
|
||
|
#endif
|
||
|
|
||
|
LABEL(breakpoint_exception)
|
||
|
EXCEPTION_NO_ERR_CODE(BREAKPOINT_VECTOR)
|
||
|
|
||
|
LABEL(overflow)
|
||
|
EXCEPTION_NO_ERR_CODE(OVERFLOW_VECTOR)
|
||
|
|
||
|
LABEL(bounds_check)
|
||
|
EXCEPTION_NO_ERR_CODE(BOUNDS_VECTOR)
|
||
|
|
||
|
LABEL(inval_opcode)
|
||
|
EXCEPTION_NO_ERR_CODE(INVAL_OP_VECTOR)
|
||
|
|
||
|
LABEL(copr_not_available)
|
||
|
TEST_INT_IN_KERNEL(4, copr_not_available_in_kernel)
|
||
|
cld /* set direction flag to a known value */
|
||
|
SAVE_PROCESS_CTX(0, KTS_INT_HARD)
|
||
|
/* stop user process cycles */
|
||
|
push %ebp
|
||
|
mov $0, %ebp
|
||
|
call _C_LABEL(context_stop)
|
||
|
call _C_LABEL(copr_not_available_handler)
|
||
|
/* reached upon failure only */
|
||
|
jmp _C_LABEL(switch_to_user)
|
||
|
|
||
|
copr_not_available_in_kernel:
|
||
|
pushl $0
|
||
|
pushl $COPROC_NOT_VECTOR
|
||
|
jmp exception_entry_nested
|
||
|
|
||
|
LABEL(double_fault)
|
||
|
EXCEPTION_ERR_CODE(DOUBLE_FAULT_VECTOR)
|
||
|
|
||
|
LABEL(copr_seg_overrun)
|
||
|
EXCEPTION_NO_ERR_CODE(COPROC_SEG_VECTOR)
|
||
|
|
||
|
LABEL(inval_tss)
|
||
|
EXCEPTION_ERR_CODE(INVAL_TSS_VECTOR)
|
||
|
|
||
|
LABEL(segment_not_present)
|
||
|
EXCEPTION_ERR_CODE(SEG_NOT_VECTOR)
|
||
|
|
||
|
LABEL(stack_exception)
|
||
|
EXCEPTION_ERR_CODE(STACK_FAULT_VECTOR)
|
||
|
|
||
|
LABEL(general_protection)
|
||
|
EXCEPTION_ERR_CODE(PROTECTION_VECTOR)
|
||
|
|
||
|
LABEL(page_fault)
|
||
|
EXCEPTION_ERR_CODE(PAGE_FAULT_VECTOR)
|
||
|
|
||
|
LABEL(copr_error)
|
||
|
EXCEPTION_NO_ERR_CODE(COPROC_ERR_VECTOR)
|
||
|
|
||
|
LABEL(alignment_check)
|
||
|
EXCEPTION_NO_ERR_CODE(ALIGNMENT_CHECK_VECTOR)
|
||
|
|
||
|
LABEL(machine_check)
|
||
|
EXCEPTION_NO_ERR_CODE(MACHINE_CHECK_VECTOR)
|
||
|
|
||
|
LABEL(simd_exception)
|
||
|
EXCEPTION_NO_ERR_CODE(SIMD_EXCEPTION_VECTOR)
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* reload_cr3 */
|
||
|
/*===========================================================================*/
|
||
|
/* PUBLIC void reload_cr3(void); */
|
||
|
ENTRY(reload_cr3)
|
||
|
push %ebp
|
||
|
mov %esp, %ebp
|
||
|
mov %cr3, %eax
|
||
|
mov %eax, %cr3
|
||
|
pop %ebp
|
||
|
ret
|
||
|
|
||
|
#ifdef CONFIG_SMP
|
||
|
ENTRY(startup_ap_32)
|
||
|
/*
|
||
|
* we are in protected mode now, %cs is correct and we need to set the
|
||
|
* data descriptors before we can touch anything
|
||
|
*
|
||
|
* first load the regular, highly mapped idt, gdt
|
||
|
*/
|
||
|
|
||
|
/*
|
||
|
* use the boot stack for now. The running CPUs are already using their
|
||
|
* own stack, the rest is still waiting to be booted
|
||
|
*/
|
||
|
movw $KERN_DS_SELECTOR, %ax
|
||
|
mov %ax, %ds
|
||
|
mov %ax, %ss
|
||
|
mov $_C_LABEL(k_boot_stktop) - 4, %esp
|
||
|
|
||
|
/* load the highly mapped idt, gdt, per-cpu tss */
|
||
|
call _C_LABEL(prot_load_selectors)
|
||
|
|
||
|
jmp _C_LABEL(smp_ap_boot)
|
||
|
hlt
|
||
|
#endif
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* data */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
.data
|
||
|
.short 0x526F /* this must be the first data entry (magic #) */
|
||
|
|
||
|
.bss
|
||
|
k_initial_stack:
|
||
|
.space K_STACK_SIZE
|
||
|
LABEL(__k_unpaged_k_initial_stktop)
|
||
|
|
||
|
/*
|
||
|
* the kernel stack
|
||
|
*/
|
||
|
k_boot_stack:
|
||
|
.space K_STACK_SIZE /* kernel stack */ /* FIXME use macro here */
|
||
|
LABEL(k_boot_stktop) /* top of kernel stack */
|
||
|
|
||
|
.balign K_STACK_SIZE
|
||
|
LABEL(k_stacks_start)
|
||
|
|
||
|
/* two pages for each stack, one for data, other as a sandbox */
|
||
|
.space 2 * (K_STACK_SIZE * CONFIG_MAX_CPUS)
|
||
|
|
||
|
LABEL(k_stacks_end)
|
||
|
|
||
|
/* top of kernel stack */
|